diff options
| author | Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> | 2007-06-08 17:14:28 +0400 |
|---|---|---|
| committer | Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> | 2007-06-08 17:14:28 +0400 |
| commit | 1abb8a8b841354e7a09ba2009376f0a6368b5cec (patch) | |
| tree | e51070e52ab7e4490a1a45b4e1deebed4a24e031 /drivers/ide/pci | |
| parent | ed84fad5002c00dfb318f797dbf591320eebc1c0 (diff) | |
| download | linux-1abb8a8b841354e7a09ba2009376f0a6368b5cec.tar.xz | |
serverworks: fix CSB6 tuning logic
Problem noticed by Joe Zbiciak, see
http://kerneltrap.org/node/8252
for details.
On CSB6 the driver is using BIOS settings and not programming DMA/PIO timings
itself. However the logic was completely broken and resulted in wrong timings
being silently allowed (instead of being corrected by the driver).
This bug would explain some data corruption/timeout issues with Serverworks
MegaIDE in RAID mode that Alan Cox has fixed recently with:
http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commitdiff;h=2074a106f52b6371885afbd714e929d60d0e3f64
For 2.6.23 we may be better off with completely switching the driver to always
programming timings (libata pata_serverworks.c driver is doing things this way
and there were no problems reported so far) but for 2.6.22 lets fix the bug
in the simplest and the least intrusive way.
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Diffstat (limited to 'drivers/ide/pci')
| -rw-r--r-- | drivers/ide/pci/serverworks.c | 40 |
1 files changed, 27 insertions, 13 deletions
diff --git a/drivers/ide/pci/serverworks.c b/drivers/ide/pci/serverworks.c index b04c99059c05..d9c4fd1ae996 100644 --- a/drivers/ide/pci/serverworks.c +++ b/drivers/ide/pci/serverworks.c @@ -1,5 +1,5 @@ /* - * linux/drivers/ide/pci/serverworks.c Version 0.10 Jun 2 2007 + * linux/drivers/ide/pci/serverworks.c Version 0.11 Jun 2 2007 * * Copyright (C) 1998-2000 Michel Aubry * Copyright (C) 1998-2000 Andrzej Krzysztofowicz @@ -176,35 +176,49 @@ static int svwks_tune_chipset (ide_drive_t *drive, u8 xferspeed) return 0; } else if ((dma_timing) && ((dma_stat&(1<<(5+unit)))==(1<<(5+unit)))) { - u8 dmaspeed = dma_timing; + u8 dmaspeed; - if ((dmaspeed & 0x20) == 0x20) + switch (dma_timing & 0x77) { + case 0x20: dmaspeed = XFER_MW_DMA_2; - else if ((dmaspeed & 0x21) == 0x21) + break; + case 0x21: dmaspeed = XFER_MW_DMA_1; - else if ((dmaspeed & 0x77) == 0x77) + break; + case 0x77: dmaspeed = XFER_MW_DMA_0; - else + break; + default: goto dma_pio; + } + drive->current_speed = drive->init_speed = dmaspeed; return 0; } dma_pio: if (pio_timing) { - u8 piospeed = pio_timing; + u8 piospeed; - if ((piospeed & 0x20) == 0x20) + switch (pio_timing & 0x7f) { + case 0x20: piospeed = XFER_PIO_4; - else if ((piospeed & 0x22) == 0x22) + break; + case 0x22: piospeed = XFER_PIO_3; - else if ((piospeed & 0x34) == 0x34) + break; + case 0x34: piospeed = XFER_PIO_2; - else if ((piospeed & 0x47) == 0x47) + break; + case 0x47: piospeed = XFER_PIO_1; - else if ((piospeed & 0x5d) == 0x5d) + break; + case 0x5d: piospeed = XFER_PIO_0; - else + break; + default: goto oem_setup_failed; + } + drive->current_speed = drive->init_speed = piospeed; return 0; } |