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author | Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> | 2007-10-17 00:29:54 +0400 |
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committer | Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> | 2007-10-17 00:29:54 +0400 |
commit | 8c91abf86280a1b900619ee0d8ae1840e943110e (patch) | |
tree | f78a53e4860fbde0bc0c741ef186c5a40d272b17 /drivers/ide/pci/piix.c | |
parent | 94c7fa0fcc89571b24c90e0a7545ad31aa390f24 (diff) | |
download | linux-8c91abf86280a1b900619ee0d8ae1840e943110e.tar.xz |
it8213/piix/slc90e66: remove {it8213,piix,slc90e66}_dma_2_pio()
Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Diffstat (limited to 'drivers/ide/pci/piix.c')
-rw-r--r-- | drivers/ide/pci/piix.c | 44 |
1 files changed, 11 insertions, 33 deletions
diff --git a/drivers/ide/pci/piix.c b/drivers/ide/pci/piix.c index 38c91ba6497b..4b397d641848 100644 --- a/drivers/ide/pci/piix.c +++ b/drivers/ide/pci/piix.c @@ -106,37 +106,6 @@ static int no_piix_dma; /** - * piix_dma_2_pio - return the PIO mode matching DMA - * @xfer_rate: transfer speed - * - * Returns the nearest equivalent PIO timing for the DMA - * mode requested by the controller. - */ - -static u8 piix_dma_2_pio (u8 xfer_rate) { - switch(xfer_rate) { - case XFER_UDMA_6: - case XFER_UDMA_5: - case XFER_UDMA_4: - case XFER_UDMA_3: - case XFER_UDMA_2: - case XFER_UDMA_1: - case XFER_UDMA_0: - case XFER_MW_DMA_2: - return 4; - case XFER_MW_DMA_1: - return 3; - case XFER_SW_DMA_2: - return 2; - case XFER_MW_DMA_0: - case XFER_SW_DMA_1: - case XFER_SW_DMA_0: - default: - return 0; - } -} - -/** * piix_set_pio_mode - set host controller for PIO mode * @drive: drive * @pio: PIO mode number @@ -225,7 +194,7 @@ static void piix_set_dma_mode(ide_drive_t *drive, const u8 speed) int u_speed = 0; int sitre; u16 reg4042, reg4a; - u8 reg48, reg54, reg55; + u8 reg48, reg54, reg55, pio; pci_read_config_word(dev, maslave, ®4042); sitre = (reg4042 & 0x4000) ? 1 : 0; @@ -262,7 +231,11 @@ static void piix_set_dma_mode(ide_drive_t *drive, const u8 speed) pci_write_config_byte(dev, 0x54, reg54 | v_flag); } else pci_write_config_byte(dev, 0x54, reg54 & ~v_flag); + + pio = 4; } else { + const u8 mwdma_to_pio[] = { 0, 3, 4 }; + if (reg48 & u_flag) pci_write_config_byte(dev, 0x48, reg48 & ~u_flag); if (reg4a & a_speed) @@ -271,9 +244,14 @@ static void piix_set_dma_mode(ide_drive_t *drive, const u8 speed) pci_write_config_byte(dev, 0x54, reg54 & ~v_flag); if (reg55 & w_flag) pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag); + + if (speed >= XFER_MW_DMA_0) + pio = mwdma_to_pio[speed - XFER_MW_DMA_0]; + else + pio = 2; /* only SWDMA2 is allowed */ } - piix_set_pio_mode(drive, piix_dma_2_pio(speed)); + piix_set_pio_mode(drive, pio); } /** |