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| author | Liguang Zhang <zhangliguang@linux.alibaba.com> | 2021-02-25 17:26:31 +0300 |
|---|---|---|
| committer | Wolfram Sang <wsa@kernel.org> | 2021-02-26 13:26:09 +0300 |
| commit | f53f15ba5a852171eccf940b22530152450a045c (patch) | |
| tree | d32ef2df5c40be9eef99d2397094d080fb9ba252 /drivers/i2c/busses/i2c-designware-core.h | |
| parent | a1858ce0cfe31368b23ba55794e409fb57ced4a4 (diff) | |
| download | linux-f53f15ba5a852171eccf940b22530152450a045c.tar.xz | |
i2c: designware: Get right data length
IC_DATA_CMD[11] indicates the first data byte received after the address
phase for receive transfer in Master receiver or Slave receiver mode,
this bit was set in some transfer flow. IC_DATA_CMD[7:0] contains the
data to be transmitted or received on the I2C bus, so we should use the
lower 8 bits to get the real data length.
Signed-off-by: Liguang Zhang <zhangliguang@linux.alibaba.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
Diffstat (limited to 'drivers/i2c/busses/i2c-designware-core.h')
| -rw-r--r-- | drivers/i2c/busses/i2c-designware-core.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h index 85307cfa7109..5392b82f68a4 100644 --- a/drivers/i2c/busses/i2c-designware-core.h +++ b/drivers/i2c/busses/i2c-designware-core.h @@ -38,6 +38,8 @@ #define DW_IC_CON_TX_EMPTY_CTRL BIT(8) #define DW_IC_CON_RX_FIFO_FULL_HLD_CTRL BIT(9) +#define DW_IC_DATA_CMD_DAT GENMASK(7, 0) + /* * Registers offset */ |