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author | Takashi Iwai <tiwai@suse.de> | 2015-12-23 10:33:34 +0300 |
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committer | Takashi Iwai <tiwai@suse.de> | 2015-12-23 10:33:34 +0300 |
commit | 59c8231089be96165735585694a801ae58ec6c95 (patch) | |
tree | 41bd60a9aec5df20e07a81fbb526c8bc05e997fc /drivers/i2c/busses/i2c-davinci.c | |
parent | de5126cc3c0b0f291d08fa591dcdf237bc595a56 (diff) | |
parent | 0fb0b822d157325b66c503d23332f64899bfb828 (diff) | |
download | linux-59c8231089be96165735585694a801ae58ec6c95.tar.xz |
Merge branch 'for-linus' into for-next
Conflicts:
drivers/gpu/drm/i915/intel_pm.c
Diffstat (limited to 'drivers/i2c/busses/i2c-davinci.c')
-rw-r--r-- | drivers/i2c/busses/i2c-davinci.c | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/drivers/i2c/busses/i2c-davinci.c b/drivers/i2c/busses/i2c-davinci.c index c5628a42170a..a8bdcb5292f5 100644 --- a/drivers/i2c/busses/i2c-davinci.c +++ b/drivers/i2c/busses/i2c-davinci.c @@ -202,8 +202,15 @@ static void i2c_davinci_calc_clk_dividers(struct davinci_i2c_dev *dev) * d is always 6 on Keystone I2C controller */ - /* get minimum of 7 MHz clock, but max of 12 MHz */ - psc = (input_clock / 7000000) - 1; + /* + * Both Davinci and current Keystone User Guides recommend a value + * between 7MHz and 12MHz. In reality 7MHz module clock doesn't + * always produce enough margin between SDA and SCL transitions. + * Measurements show that the higher the module clock is, the + * bigger is the margin, providing more reliable communication. + * So we better target for 12MHz. + */ + psc = (input_clock / 12000000) - 1; if ((input_clock / (psc + 1)) > 12000000) psc++; /* better to run under spec than over */ d = (psc >= 2) ? 5 : 7 - psc; |