diff options
| author | James Clark <james.clark@arm.com> | 2022-03-04 20:19:12 +0300 |
|---|---|---|
| committer | Mathieu Poirier <mathieu.poirier@linaro.org> | 2022-04-13 20:05:56 +0300 |
| commit | c86dd9869128156696b4482b2a073790d3db2cfb (patch) | |
| tree | ccfc34cc457025ddc573964a8a1cea545335f312 /drivers/hwtracing/coresight | |
| parent | 67493ca4cbe7e8335b94dfe71b12eae79a07b8b8 (diff) | |
| download | linux-c86dd9869128156696b4482b2a073790d3db2cfb.tar.xz | |
coresight: etm4x: Cleanup TRCRSCTLRn register accesses
This is a no-op change for style and consistency and has no effect on
the binary output by the compiler. In sysreg.h fields are defined as
the register name followed by the field name and then _MASK. This
allows for grepping for fields by name rather than using magic numbers.
Signed-off-by: James Clark <james.clark@arm.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Link: https://lore.kernel.org/r/20220304171913.2292458-16-james.clark@arm.com
/* Removed extra new lines */
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Diffstat (limited to 'drivers/hwtracing/coresight')
| -rw-r--r-- | drivers/hwtracing/coresight/coresight-etm4x-sysfs.c | 7 | ||||
| -rw-r--r-- | drivers/hwtracing/coresight/coresight-etm4x.h | 5 |
2 files changed, 10 insertions, 2 deletions
diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c index 3ae6f4432646..6ea8181816fc 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c @@ -1726,8 +1726,11 @@ static ssize_t res_ctrl_store(struct device *dev, /* For odd idx pair inversal bit is RES0 */ if (idx % 2 != 0) /* PAIRINV, bit[21] */ - val &= ~BIT(21); - config->res_ctrl[idx] = val & GENMASK(21, 0); + val &= ~TRCRSCTLRn_PAIRINV; + config->res_ctrl[idx] = val & (TRCRSCTLRn_PAIRINV | + TRCRSCTLRn_INV | + TRCRSCTLRn_GROUP_MASK | + TRCRSCTLRn_SELECT_MASK); spin_unlock(&drvdata->spinlock); return size; } diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtracing/coresight/coresight-etm4x.h index 15704982357f..33869c1d20c3 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.h +++ b/drivers/hwtracing/coresight/coresight-etm4x.h @@ -223,6 +223,11 @@ #define TRCBBCTLR_MODE BIT(8) #define TRCBBCTLR_RANGE_MASK GENMASK(7, 0) +#define TRCRSCTLRn_PAIRINV BIT(21) +#define TRCRSCTLRn_INV BIT(20) +#define TRCRSCTLRn_GROUP_MASK GENMASK(19, 16) +#define TRCRSCTLRn_SELECT_MASK GENMASK(15, 0) + /* * System instructions to access ETM registers. * See ETMv4.4 spec ARM IHI0064F section 4.3.6 System instructions |