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authorWill Deacon <will.deacon@arm.com>2014-06-24 21:26:26 +0400
committerWill Deacon <will.deacon@arm.com>2014-07-02 14:55:49 +0400
commita65217a4bcdb654e04fcc42b302d8a15708e14ce (patch)
tree1affd8e038912b297f888f0ed84631a758968816 /drivers/hwmon/jz4740-hwmon.c
parent7171511eaec5bf23fb06078f59784a3a0626b38f (diff)
downloadlinux-a65217a4bcdb654e04fcc42b302d8a15708e14ce.tar.xz
iommu/arm-smmu: fix calculation of TCR.T0SZ
T0SZ controls the input address range for TTBR0, so use the input address range rather than the output address range for the calculation. For stage-2, this means using the output size of stage-1. Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'drivers/hwmon/jz4740-hwmon.c')
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