diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2023-05-31 16:56:25 +0300 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2023-06-05 18:48:30 +0300 |
| commit | 19db2062094c75c64039d820c2547aad4dcfd905 (patch) | |
| tree | fa843c031e4657f0fecd012f64dec4060cf9f6f1 /drivers/gpu | |
| parent | d58bfcd4ea9910f59cf8327a36603e214e631b12 (diff) | |
| download | linux-19db2062094c75c64039d820c2547aad4dcfd905.tar.xz | |
drm/i915: No 10bit gamma on desktop gen3 parts
Apparently desktop gen3 parts don't support the
10bit gamma mode at all. Stop claiming otherwise.
As is the case with pipe A on gen3 mobile parts, the
PIPECONF gamma mode bit can be set but it has no
effect on the output.
PNV seems to be the only slight exception, but generally
the desktop PNV variant looks more like a mobile part so
this is not entirely surprising.
Fixes: 67630bacae23 ("drm/i915: Add 10bit gamma mode for gen2/3")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230531135625.3467-1-ville.syrjala@linux.intel.com
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_display_device.c | 16 |
1 files changed, 13 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c index 464df1764a86..1aac7234e186 100644 --- a/drivers/gpu/drm/i915/display/intel_display_device.c +++ b/drivers/gpu/drm/i915/display/intel_display_device.c @@ -222,7 +222,6 @@ static const struct intel_display_device_info i865g_display = { .has_overlay = 1, \ I9XX_PIPE_OFFSETS, \ I9XX_CURSOR_OFFSETS, \ - I9XX_COLORS, \ \ .__runtime_defaults.ip.ver = 3, \ .__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \ @@ -231,12 +230,14 @@ static const struct intel_display_device_info i865g_display = { static const struct intel_display_device_info i915g_display = { GEN3_DISPLAY, + I845_COLORS, .cursor_needs_physical = 1, .overlay_needs_physical = 1, }; static const struct intel_display_device_info i915gm_display = { GEN3_DISPLAY, + I9XX_COLORS, .cursor_needs_physical = 1, .overlay_needs_physical = 1, .supports_tv = 1, @@ -246,6 +247,7 @@ static const struct intel_display_device_info i915gm_display = { static const struct intel_display_device_info i945g_display = { GEN3_DISPLAY, + I845_COLORS, .has_hotplug = 1, .cursor_needs_physical = 1, .overlay_needs_physical = 1, @@ -253,6 +255,7 @@ static const struct intel_display_device_info i945g_display = { static const struct intel_display_device_info i945gm_display = { GEN3_DISPLAY, + I9XX_COLORS, .has_hotplug = 1, .cursor_needs_physical = 1, .overlay_needs_physical = 1, @@ -263,6 +266,13 @@ static const struct intel_display_device_info i945gm_display = { static const struct intel_display_device_info g33_display = { GEN3_DISPLAY, + I845_COLORS, + .has_hotplug = 1, +}; + +static const struct intel_display_device_info pnv_display = { + GEN3_DISPLAY, + I9XX_COLORS, .has_hotplug = 1, }; @@ -677,8 +687,8 @@ static const struct { INTEL_I965GM_IDS(&i965gm_display), INTEL_GM45_IDS(&gm45_display), INTEL_G45_IDS(&g45_display), - INTEL_PINEVIEW_G_IDS(&g33_display), - INTEL_PINEVIEW_M_IDS(&g33_display), + INTEL_PINEVIEW_G_IDS(&pnv_display), + INTEL_PINEVIEW_M_IDS(&pnv_display), INTEL_IRONLAKE_D_IDS(&ilk_d_display), INTEL_IRONLAKE_M_IDS(&ilk_m_display), INTEL_SNB_D_IDS(&snb_display), |