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authorRex Zhu <Rex.Zhu@amd.com>2016-07-20 13:40:09 +0300
committerAlex Deucher <alexander.deucher@amd.com>2016-07-29 21:36:59 +0300
commita93d54d842ac5d1502fce65d8d937a41a45245af (patch)
treecbeca16eeaf34ff19d27cc445181d65eeb2c98c0 /drivers/gpu
parent0a6abefe9e5bcc81ad75a511850f86e7083efecb (diff)
downloadlinux-a93d54d842ac5d1502fce65d8d937a41a45245af.tar.xz
Revert "drm/amd/powerplay: workaround issue that when uvd dpm disabled,"
This reverts commit <2ded8c7f04825bc5cde2624f6aa83f1ff62672c0> As we enabled bypass mode for uvd on polaris10 when clockgating. so no need to set uvd clock manually. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Christian König<christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
index a46a64c125d1..b1bbe50f93e1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
@@ -1106,10 +1106,6 @@ static void amdgpu_uvd_idle_work_handler(struct work_struct *work)
if (fences == 0 && handles == 0) {
if (adev->pm.dpm_enabled) {
amdgpu_dpm_enable_uvd(adev, false);
- /* just work around for uvd clock remain high even
- * when uvd dpm disabled on Polaris10 */
- if (adev->asic_type == CHIP_POLARIS10)
- amdgpu_asic_set_uvd_clocks(adev, 0, 0);
} else {
amdgpu_asic_set_uvd_clocks(adev, 0, 0);
}