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authorThierry Reding <treding@nvidia.com>2019-09-09 15:28:46 +0300
committerThierry Reding <treding@nvidia.com>2019-10-28 13:18:08 +0300
commitd98914ebc2af4504e2abc266610c29b4131598a3 (patch)
treead7fd4beb40ea15f2b6567bcba05637445ecbc94 /drivers/gpu/host1x/dev.c
parent004e822a6faa807f4413ac066fa29ea433550070 (diff)
downloadlinux-d98914ebc2af4504e2abc266610c29b4131598a3.tar.xz
gpu: host1x: Do not limit DMA segment size
host1x nor any its clients have any limitations on the DMA segment size, so don't pretend that they do. Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/host1x/dev.c')
-rw-r--r--drivers/gpu/host1x/dev.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c
index 5a3f797240d4..e5fdeea27158 100644
--- a/drivers/gpu/host1x/dev.c
+++ b/drivers/gpu/host1x/dev.c
@@ -237,6 +237,9 @@ static int host1x_probe(struct platform_device *pdev)
return PTR_ERR(host->hv_regs);
}
+ host->dev->dma_parms = &host->dma_parms;
+ dma_set_max_seg_size(host->dev, UINT_MAX);
+
dma_set_mask_and_coherent(host->dev, host->info->dma_mask);
if (host->info->init) {