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| author | Michał Winiarski <michal.winiarski@intel.com> | 2023-12-05 04:33:07 +0300 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2023-12-21 19:45:12 +0300 |
| commit | 7704f32c93cff69d8d0e842638f30e4dc9d93b2a (patch) | |
| tree | ae9748605b086d11068b4b9e7d0d7d7c15473008 /drivers/gpu/drm/xe/xe_uc.c | |
| parent | bf2d0d88c3b8d325eee670b2e0b4545de6d30998 (diff) | |
| download | linux-7704f32c93cff69d8d0e842638f30e4dc9d93b2a.tar.xz | |
drm/xe/uc: Extract xe_uc_sanitize_reset
Earlier GuC load will require more fine-grained control over reset.
Extract it outside of xe_uc_init_hw.
Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/xe_uc.c')
| -rw-r--r-- | drivers/gpu/drm/xe/xe_uc.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/gpu/drm/xe/xe_uc.c b/drivers/gpu/drm/xe/xe_uc.c index 15dcd1f91e9c..72a7b3c2577d 100644 --- a/drivers/gpu/drm/xe/xe_uc.c +++ b/drivers/gpu/drm/xe/xe_uc.c @@ -80,6 +80,10 @@ int xe_uc_init_post_hwconfig(struct xe_uc *uc) if (!xe_device_uc_enabled(uc_to_xe(uc))) return 0; + err = xe_uc_sanitize_reset(uc); + if (err) + return err; + err = xe_guc_init_post_hwconfig(&uc->guc); if (err) return err; @@ -101,13 +105,13 @@ static int uc_reset(struct xe_uc *uc) return 0; } -void xe_uc_sanitize(struct xe_uc *uc) +static void xe_uc_sanitize(struct xe_uc *uc) { xe_huc_sanitize(&uc->huc); xe_guc_sanitize(&uc->guc); } -static int xe_uc_sanitize_reset(struct xe_uc *uc) +int xe_uc_sanitize_reset(struct xe_uc *uc) { xe_uc_sanitize(uc); @@ -147,10 +151,6 @@ int xe_uc_init_hw(struct xe_uc *uc) if (!xe_device_uc_enabled(uc_to_xe(uc))) return 0; - ret = xe_uc_sanitize_reset(uc); - if (ret) - return ret; - ret = xe_huc_upload(&uc->huc); if (ret) return ret; |