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authorMatt Roper <matthew.d.roper@intel.com>2023-09-14 02:14:17 +0300
committerRodrigo Vivi <rodrigo.vivi@intel.com>2023-12-21 19:41:14 +0300
commit0d0534750f9d4575abf0da3b41a78e5643e6c8dd (patch)
tree8904cc887a08011c5ae8ca289f71c03746f79cf2 /drivers/gpu/drm/xe/xe_tile.c
parent7764222d54b71a9577cff9296420bf0a780b0c5d (diff)
downloadlinux-0d0534750f9d4575abf0da3b41a78e5643e6c8dd.tar.xz
drm/xe/wa: Apply tile workarounds at probe/resume
Although the vast majority of workarounds the driver needs to implement are either GT-based or display-based, there are occasionally workarounds that reside outside those parts of the hardware (i.e., in they target registers in the sgunit/soc); we can consider these to be "tile" workarounds since there will be instance of these registers per tile. The registers in question should only lose their values during a function-level reset, so they only need to be applied during probe and resume; the registers will not be affected by GT/engine resets. Tile workarounds are rare (there's only one, 22010954014, that's relevant to Xe at the moment) so it's probably not worth updating the xe_rtp design to handle tile-level workarounds yet, although we may want to consider that in the future if/when more of these show up on future platforms. Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Acked-by: Jani Nikula <jani.nikula@intel.com> Link: https://lore.kernel.org/r/20230913231411.291933-13-matthew.d.roper@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/xe_tile.c')
-rw-r--r--drivers/gpu/drm/xe/xe_tile.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/xe/xe_tile.c b/drivers/gpu/drm/xe/xe_tile.c
index e0bc2b60ab09..131752a57f65 100644
--- a/drivers/gpu/drm/xe/xe_tile.c
+++ b/drivers/gpu/drm/xe/xe_tile.c
@@ -12,6 +12,7 @@
#include "xe_tile.h"
#include "xe_tile_sysfs.h"
#include "xe_ttm_vram_mgr.h"
+#include "xe_wa.h"
/**
* DOC: Multi-tile Design
@@ -143,6 +144,8 @@ int xe_tile_init_noalloc(struct xe_tile *tile)
if (IS_ERR(tile->mem.kernel_bb_pool))
err = PTR_ERR(tile->mem.kernel_bb_pool);
+ xe_wa_apply_tile_workarounds(tile);
+
xe_tile_sysfs_init(tile);
err_mem_access: