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| author | Raag Jadav <raag.jadav@intel.com> | 2025-05-06 08:48:34 +0300 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2025-05-07 22:31:11 +0300 |
| commit | 0e414bf7ad012e55c8a0aa4e91f68cb1cf5801ff (patch) | |
| tree | 6fadada6c588ca9662a12cbf44a0bec5202967f5 /drivers/gpu/drm/xe/xe_pcode_api.h | |
| parent | f3e875b3c05ce049634f04cc249dea2b2e728eb7 (diff) | |
| download | linux-0e414bf7ad012e55c8a0aa4e91f68cb1cf5801ff.tar.xz | |
drm/xe: Expose PCIe link downgrade attributes
Expose sysfs attributes for PCIe link downgrade capability and status.
v2: Move from debugfs to sysfs (Lucas, Rodrigo, Badal)
Rework macros and their naming (Rodrigo)
v3: Use sysfs_create_files() (Riana)
Fix checkpatch warning (Riana)
v4: s/downspeed/downgrade (Lucas, Rodrigo, Riana)
v5: Use PCIe Gen agnostic naming (Rodrigo)
v6: s/pcie_gen/auto_link (Lucas)
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Riana Tauro <riana.tauro@intel.com>
Link: https://lore.kernel.org/r/20250506054835.3395220-3-raag.jadav@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/xe_pcode_api.h')
| -rw-r--r-- | drivers/gpu/drm/xe/xe_pcode_api.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/xe/xe_pcode_api.h b/drivers/gpu/drm/xe/xe_pcode_api.h index e622ae17f08d..127d4d26c4cf 100644 --- a/drivers/gpu/drm/xe/xe_pcode_api.h +++ b/drivers/gpu/drm/xe/xe_pcode_api.h @@ -34,6 +34,7 @@ #define DGFX_PCODE_STATUS 0x7E #define DGFX_GET_INIT_STATUS 0x0 #define DGFX_INIT_STATUS_COMPLETE 0x1 +#define DGFX_LINK_DOWNGRADE_STATUS REG_BIT(31) #define PCODE_POWER_SETUP 0x7C #define POWER_SETUP_SUBCOMMAND_READ_I1 0x4 @@ -66,6 +67,10 @@ /* Auxiliary info bits */ #define AUXINFO_HISTORY_OFFSET REG_GENMASK(31, 29) +#define BMG_PCIE_CAP XE_REG(0x138340) +#define LINK_DOWNGRADE REG_GENMASK(1, 0) +#define DOWNGRADE_CAPABLE 2 + struct pcode_err_decode { int errno; const char *str; |