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authorZack Rusin <zackr@vmware.com>2021-06-15 21:23:33 +0300
committerZack Rusin <zackr@vmware.com>2021-06-16 21:27:00 +0300
commitebc9ac7c3dfe85e7e29af896c7fd1095129fd72c (patch)
treeab88308e2d51df6493092d9e5d5a3bbc370ec2b6 /drivers/gpu/drm/vmwgfx/vmwgfx_surface.c
parent3f35b6b041f6f846de623dd2a10aceedf06df134 (diff)
downloadlinux-ebc9ac7c3dfe85e7e29af896c7fd1095129fd72c.tar.xz
drm/vmwgfx: Update device headers
Historically our device headers have been forked versions of the internal device headers, this has made maintaining them a bit of a burden. To fix the situation, going forward, the device headers will be verbatim copies of the internal headers. To do that the driver code has to be adapted to use pristine device headers. This will make future update to the device headers trivial and automatic. Signed-off-by: Zack Rusin <zackr@vmware.com> Reviewed-by: Martin Krastev <krastevm@vmware.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210615182336.995192-2-zackr@vmware.com
Diffstat (limited to 'drivers/gpu/drm/vmwgfx/vmwgfx_surface.c')
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_surface.c75
1 files changed, 38 insertions, 37 deletions
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c b/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c
index 47c03a276515..0eba47762bed 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c
@@ -31,6 +31,7 @@
#include "vmwgfx_resource_priv.h"
#include "vmwgfx_so.h"
#include "vmwgfx_binding.h"
+#include "vmw_surface_cache.h"
#include "device_include/svga3d_surfacedefs.h"
#define SVGA3D_FLAGS_64(upper32, lower32) (((uint64_t)upper32 << 32) | lower32)
@@ -78,7 +79,7 @@ struct vmw_surface_offset {
* @boxes: Array of SVGA3dBoxes indicating dirty regions. One per subresource.
*/
struct vmw_surface_dirty {
- struct svga3dsurface_cache cache;
+ struct vmw_surface_cache cache;
size_t size;
u32 num_subres;
SVGA3dBox boxes[];
@@ -307,8 +308,8 @@ static void vmw_surface_dma_encode(struct vmw_surface *srf,
{
uint32_t i;
struct vmw_surface_dma *cmd = (struct vmw_surface_dma *)cmd_space;
- const struct svga3d_surface_desc *desc =
- svga3dsurface_get_desc(srf->metadata.format);
+ const struct SVGA3dSurfaceDesc *desc =
+ vmw_surface_get_desc(srf->metadata.format);
for (i = 0; i < srf->metadata.num_sizes; ++i) {
SVGA3dCmdHeader *header = &cmd->header;
@@ -323,8 +324,7 @@ static void vmw_surface_dma_encode(struct vmw_surface *srf,
body->guest.ptr = *ptr;
body->guest.ptr.offset += cur_offset->bo_offset;
- body->guest.pitch = svga3dsurface_calculate_pitch(desc,
- cur_size);
+ body->guest.pitch = vmw_surface_calculate_pitch(desc, cur_size);
body->host.sid = srf->res.id;
body->host.face = cur_offset->face;
body->host.mipmap = cur_offset->mip;
@@ -342,7 +342,7 @@ static void vmw_surface_dma_encode(struct vmw_surface *srf,
suffix->suffixSize = sizeof(*suffix);
suffix->maximumOffset =
- svga3dsurface_get_image_buffer_size(desc, cur_size,
+ vmw_surface_get_image_buffer_size(desc, cur_size,
body->guest.pitch);
suffix->flags.discard = 0;
suffix->flags.unsynchronized = 0;
@@ -432,7 +432,7 @@ static int vmw_legacy_srf_create(struct vmw_resource *res)
goto out_no_id;
}
- if (unlikely(res->id >= SVGA3D_MAX_SURFACE_IDS)) {
+ if (unlikely(res->id >= SVGA3D_HB_MAX_SURFACE_IDS)) {
ret = -EBUSY;
goto out_no_fifo;
}
@@ -751,7 +751,7 @@ int vmw_surface_define_ioctl(struct drm_device *dev, void *data,
struct vmw_surface_offset *cur_offset;
uint32_t num_sizes;
uint32_t size;
- const struct svga3d_surface_desc *desc;
+ const SVGA3dSurfaceDesc *desc;
if (unlikely(vmw_user_surface_size == 0))
vmw_user_surface_size = ttm_round_pot(sizeof(*user_srf)) +
@@ -772,8 +772,8 @@ int vmw_surface_define_ioctl(struct drm_device *dev, void *data,
ttm_round_pot(num_sizes * sizeof(struct drm_vmw_size)) +
ttm_round_pot(num_sizes * sizeof(struct vmw_surface_offset));
- desc = svga3dsurface_get_desc(req->format);
- if (unlikely(desc->block_desc == SVGA3DBLOCKDESC_NONE)) {
+ desc = vmw_surface_get_desc(req->format);
+ if (unlikely(desc->blockDesc == SVGA3DBLOCKDESC_NONE)) {
VMW_DEBUG_USER("Invalid format %d for surface creation.\n",
req->format);
return -EINVAL;
@@ -833,13 +833,13 @@ int vmw_surface_define_ioctl(struct drm_device *dev, void *data,
for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i) {
for (j = 0; j < metadata->mip_levels[i]; ++j) {
- uint32_t stride = svga3dsurface_calculate_pitch
- (desc, cur_size);
+ uint32_t stride = vmw_surface_calculate_pitch(
+ desc, cur_size);
cur_offset->face = i;
cur_offset->mip = j;
cur_offset->bo_offset = cur_bo_offset;
- cur_bo_offset += svga3dsurface_get_image_buffer_size
+ cur_bo_offset += vmw_surface_get_image_buffer_size
(desc, cur_size, stride);
++cur_offset;
++cur_size;
@@ -1711,10 +1711,10 @@ out_bad_resource:
* than partial z slices are dirtied.
*/
static void vmw_subres_dirty_add(struct vmw_surface_dirty *dirty,
- const struct svga3dsurface_loc *loc_start,
- const struct svga3dsurface_loc *loc_end)
+ const struct vmw_surface_loc *loc_start,
+ const struct vmw_surface_loc *loc_end)
{
- const struct svga3dsurface_cache *cache = &dirty->cache;
+ const struct vmw_surface_cache *cache = &dirty->cache;
SVGA3dBox *box = &dirty->boxes[loc_start->sub_resource];
u32 mip = loc_start->sub_resource % cache->num_mip_levels;
const struct drm_vmw_size *size = &cache->mip[mip].size;
@@ -1760,7 +1760,7 @@ static void vmw_subres_dirty_add(struct vmw_surface_dirty *dirty,
*/
static void vmw_subres_dirty_full(struct vmw_surface_dirty *dirty, u32 subres)
{
- const struct svga3dsurface_cache *cache = &dirty->cache;
+ const struct vmw_surface_cache *cache = &dirty->cache;
u32 mip = subres % cache->num_mip_levels;
const struct drm_vmw_size *size = &cache->mip[mip].size;
SVGA3dBox *box = &dirty->boxes[subres];
@@ -1783,15 +1783,15 @@ static void vmw_surface_tex_dirty_range_add(struct vmw_resource *res,
struct vmw_surface_dirty *dirty =
(struct vmw_surface_dirty *) res->dirty;
size_t backup_end = res->backup_offset + res->backup_size;
- struct svga3dsurface_loc loc1, loc2;
- const struct svga3dsurface_cache *cache;
+ struct vmw_surface_loc loc1, loc2;
+ const struct vmw_surface_cache *cache;
start = max_t(size_t, start, res->backup_offset) - res->backup_offset;
end = min(end, backup_end) - res->backup_offset;
cache = &dirty->cache;
- svga3dsurface_get_loc(cache, &loc1, start);
- svga3dsurface_get_loc(cache, &loc2, end - 1);
- svga3dsurface_inc_loc(cache, &loc2);
+ vmw_surface_get_loc(cache, &loc1, start);
+ vmw_surface_get_loc(cache, &loc2, end - 1);
+ vmw_surface_inc_loc(cache, &loc2);
if (loc1.sheet != loc2.sheet) {
u32 sub_res;
@@ -1811,12 +1811,12 @@ static void vmw_surface_tex_dirty_range_add(struct vmw_resource *res,
vmw_subres_dirty_add(dirty, &loc1, &loc2);
} else {
/* Dirty range covers multiple sub-resources */
- struct svga3dsurface_loc loc_min, loc_max;
+ struct vmw_surface_loc loc_min, loc_max;
u32 sub_res;
- svga3dsurface_max_loc(cache, loc1.sub_resource, &loc_max);
+ vmw_surface_max_loc(cache, loc1.sub_resource, &loc_max);
vmw_subres_dirty_add(dirty, &loc1, &loc_max);
- svga3dsurface_min_loc(cache, loc2.sub_resource - 1, &loc_min);
+ vmw_surface_min_loc(cache, loc2.sub_resource - 1, &loc_min);
vmw_subres_dirty_add(dirty, &loc_min, &loc2);
for (sub_res = loc1.sub_resource + 1;
sub_res < loc2.sub_resource - 1; ++sub_res)
@@ -1833,7 +1833,7 @@ static void vmw_surface_buf_dirty_range_add(struct vmw_resource *res,
{
struct vmw_surface_dirty *dirty =
(struct vmw_surface_dirty *) res->dirty;
- const struct svga3dsurface_cache *cache = &dirty->cache;
+ const struct vmw_surface_cache *cache = &dirty->cache;
size_t backup_end = res->backup_offset + cache->mip_chain_bytes;
SVGA3dBox *box = &dirty->boxes[0];
u32 box_c2;
@@ -1876,7 +1876,7 @@ static int vmw_surface_dirty_sync(struct vmw_resource *res)
struct vmw_surface_dirty *dirty =
(struct vmw_surface_dirty *) res->dirty;
size_t alloc_size;
- const struct svga3dsurface_cache *cache = &dirty->cache;
+ const struct vmw_surface_cache *cache = &dirty->cache;
struct {
SVGA3dCmdHeader header;
SVGA3dCmdDXUpdateSubResource body;
@@ -1989,7 +1989,7 @@ static int vmw_surface_dirty_alloc(struct vmw_resource *res)
}
num_samples = max_t(u32, 1, metadata->multisample_count);
- ret = svga3dsurface_setup_cache(&metadata->base_size, metadata->format,
+ ret = vmw_surface_setup_cache(&metadata->base_size, metadata->format,
num_mip, num_layers, num_samples,
&dirty->cache);
if (ret)
@@ -2080,7 +2080,7 @@ int vmw_gb_surface_define(struct vmw_private *dev_priv,
*srf_out = NULL;
if (req->scanout) {
- if (!svga3dsurface_is_screen_target_format(req->format)) {
+ if (!vmw_surface_is_screen_target_format(req->format)) {
VMW_DEBUG_USER("Invalid Screen Target surface format.");
return -EINVAL;
}
@@ -2095,10 +2095,10 @@ int vmw_gb_surface_define(struct vmw_private *dev_priv,
return -EINVAL;
}
} else {
- const struct svga3d_surface_desc *desc =
- svga3dsurface_get_desc(req->format);
+ const SVGA3dSurfaceDesc *desc =
+ vmw_surface_get_desc(req->format);
- if (desc->block_desc == SVGA3DBLOCKDESC_NONE) {
+ if (desc->blockDesc == SVGA3DBLOCKDESC_NONE) {
VMW_DEBUG_USER("Invalid surface format.\n");
return -EINVAL;
}
@@ -2147,11 +2147,12 @@ int vmw_gb_surface_define(struct vmw_private *dev_priv,
sample_count = metadata->multisample_count;
srf->res.backup_size =
- svga3dsurface_get_serialized_size_extended(metadata->format,
- metadata->base_size,
- metadata->mip_levels[0],
- num_layers,
- sample_count);
+ vmw_surface_get_serialized_size_extended(
+ metadata->format,
+ metadata->base_size,
+ metadata->mip_levels[0],
+ num_layers,
+ sample_count);
if (metadata->flags & SVGA3D_SURFACE_BIND_STREAM_OUTPUT)
srf->res.backup_size += sizeof(SVGA3dDXSOState);