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| author | Thierry Reding <treding@nvidia.com> | 2015-01-28 18:14:26 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2015-04-02 19:49:22 +0300 |
| commit | 375e118437716acdccda224abb3d464ecfe92884 (patch) | |
| tree | 8460c95274239e289bb5d7f678b86fbc61c0c9d9 /drivers/gpu/drm/tegra | |
| parent | 9d910b6068be9b6670d0ebba2ddc3e7816dd8881 (diff) | |
| download | linux-375e118437716acdccda224abb3d464ecfe92884.tar.xz | |
drm/tegra: hdmi: Resets are synchronous
Resets on Tegra are synchronous, so keep the clock enabled while
asserting the reset.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/drm/tegra')
| -rw-r--r-- | drivers/gpu/drm/tegra/hdmi.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/tegra/hdmi.c b/drivers/gpu/drm/tegra/hdmi.c index 7eaaee74a039..05213b2ec2bd 100644 --- a/drivers/gpu/drm/tegra/hdmi.c +++ b/drivers/gpu/drm/tegra/hdmi.c @@ -1394,8 +1394,8 @@ static int tegra_hdmi_exit(struct host1x_client *client) tegra_output_exit(&hdmi->output); - clk_disable_unprepare(hdmi->clk); reset_control_assert(hdmi->rst); + clk_disable_unprepare(hdmi->clk); regulator_disable(hdmi->vdd); regulator_disable(hdmi->pll); |