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author | Thierry Reding <thierry.reding@avionic-design.de> | 2013-10-05 00:34:01 +0400 |
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committer | Thierry Reding <treding@nvidia.com> | 2013-10-31 12:55:46 +0400 |
commit | 773af77fc479fd454c3f6836f86bf63996545cf4 (patch) | |
tree | a3610dd713a97cf934810079da61b1196e85d95b /drivers/gpu/drm/tegra/dc.h | |
parent | 5f60ed0d840d53e9d65aa54e1a5365af8ce2769e (diff) | |
download | linux-773af77fc479fd454c3f6836f86bf63996545cf4.tar.xz |
drm/tegra: Add support for tiled buffer objects
The gr2d and gr3d engines work more efficiently on buffers with a tiled
memory layout. Allow created buffers to be marked as tiled so that the
display controller can scan them out properly.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/drm/tegra/dc.h')
-rw-r--r-- | drivers/gpu/drm/tegra/dc.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/tegra/dc.h b/drivers/gpu/drm/tegra/dc.h index 79eaec9aac77..e0b94c26bb86 100644 --- a/drivers/gpu/drm/tegra/dc.h +++ b/drivers/gpu/drm/tegra/dc.h @@ -365,6 +365,10 @@ #define DC_WIN_BUF_STRIDE 0x70b #define DC_WIN_UV_BUF_STRIDE 0x70c #define DC_WIN_BUFFER_ADDR_MODE 0x70d +#define DC_WIN_BUFFER_ADDR_MODE_LINEAR (0 << 0) +#define DC_WIN_BUFFER_ADDR_MODE_TILE (1 << 0) +#define DC_WIN_BUFFER_ADDR_MODE_LINEAR_UV (0 << 16) +#define DC_WIN_BUFFER_ADDR_MODE_TILE_UV (1 << 16) #define DC_WIN_DV_CONTROL 0x70e #define DC_WIN_BLEND_NOKEY 0x70f |