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authorThierry Reding <treding@nvidia.com>2017-10-12 20:12:57 +0300
committerThierry Reding <treding@nvidia.com>2017-12-13 16:36:36 +0300
commitc57997bce423fb71334a1fefa524569e48a1718f (patch)
treecc01f3938060f960a0b8b3f3a52f17408ad47389 /drivers/gpu/drm/tegra/dc.c
parent880cee0b7ff379ebcf1f3d839fa59d1bcd726797 (diff)
downloadlinux-c57997bce423fb71334a1fefa524569e48a1718f.tar.xz
drm/tegra: sor: Add Tegra186 support
The SOR found on Tegra186 is very similar to the one found on Tegra210 and earlier. However, due to some changes in the display architecture, some programming sequences have changed and some register have moved around. Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/drm/tegra/dc.c')
-rw-r--r--drivers/gpu/drm/tegra/dc.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
index 6790e2d869c4..906752d86622 100644
--- a/drivers/gpu/drm/tegra/dc.c
+++ b/drivers/gpu/drm/tegra/dc.c
@@ -54,6 +54,19 @@ static u32 tegra_dc_readl_active(struct tegra_dc *dc, unsigned long offset)
return value;
}
+bool tegra_dc_has_output(struct tegra_dc *dc, struct device *dev)
+{
+ struct device_node *np = dc->dev->of_node;
+ struct of_phandle_iterator it;
+ int err;
+
+ of_for_each_phandle(&it, err, np, "nvidia,outputs", NULL, 0)
+ if (it.node == dev->of_node)
+ return true;
+
+ return false;
+}
+
/*
* Double-buffered registers have two copies: ASSEMBLY and ACTIVE. When the
* *_ACT_REQ bits are set the ASSEMBLY copy is latched into the ACTIVE copy.