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| author | Giulio Benetti <giulio.benetti@micronovasrl.com> | 2018-02-15 20:54:48 +0300 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2018-02-16 23:16:03 +0300 |
| commit | fa4127c5eb8def998fd8a471d51a4f2560dea0a2 (patch) | |
| tree | e463a25d2caa1c25a2576205f50c4c5848b8ba51 /drivers/gpu/drm/sun4i | |
| parent | cd0e93d865538decfd0f917c112d3fc57aac90fe (diff) | |
| download | linux-fa4127c5eb8def998fd8a471d51a4f2560dea0a2.tar.xz | |
drm/sun4i: fix HSYNC and VSYNC polarity
Differently from other Lcd signals, HSYNC and VSYNC signals
result inverted if their bits are cleared to 0.
Invert their settings of IO_POL register.
Signed-off-by: Giulio Benetti <giulio.benetti@micronovasrl.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1518717288-123578-1-git-send-email-giulio.benetti@micronovasrl.com
Diffstat (limited to 'drivers/gpu/drm/sun4i')
| -rw-r--r-- | drivers/gpu/drm/sun4i/sun4i_tcon.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c index e6f9a2b4e9b2..8416899266cf 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c @@ -394,10 +394,10 @@ static void sun4i_tcon0_mode_set_rgb(struct sun4i_tcon *tcon, SUN4I_TCON0_BASIC3_H_SYNC(hsync)); /* Setup the polarity of the various signals */ - if (!(mode->flags & DRM_MODE_FLAG_PHSYNC)) + if (mode->flags & DRM_MODE_FLAG_PHSYNC) val |= SUN4I_TCON0_IO_POL_HSYNC_POSITIVE; - if (!(mode->flags & DRM_MODE_FLAG_PVSYNC)) + if (mode->flags & DRM_MODE_FLAG_PVSYNC) val |= SUN4I_TCON0_IO_POL_VSYNC_POSITIVE; regmap_update_bits(tcon->regs, SUN4I_TCON0_IO_POL_REG, |