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| author | Paul Kocialkowski <paul.kocialkowski@bootlin.com> | 2018-07-17 15:25:22 +0300 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2018-07-17 18:30:59 +0300 |
| commit | d8b3f454dab48bc40528aa5f19f7f27f2a6dc825 (patch) | |
| tree | 25e67b0fd7295b747ba0180afee078c54f841d4e /drivers/gpu/drm/sun4i/sun8i_mixer.c | |
| parent | 4c2ae34f64c80991501ebd830b13dce5c7dc3621 (diff) | |
| download | linux-d8b3f454dab48bc40528aa5f19f7f27f2a6dc825.tar.xz | |
drm/sun4i: sun8i: Avoid clearing blending order at each atomic commit
Blending order is set based on the z position of each DRM plane. The
blending order register is currently cleared at each atomic DRM commit,
with the intent that each committed plane will set the appropriate
bits (based on its z-pos) when enabling the plane.
However, it sometimes happens that a particular plane is left unchanged
by an atomic commit and thus will not be configured again. In that
scenario, blending order is cleared and only the bits relevant for the
planes affected by the commit are set. This leaves the planes that did
not change without their blending order set in the register, leading
to that plane not being displayed.
Instead of clearing the blending order register at every atomic commit,
this change moves the register's initial clear at bind time and only
clears the bits for a specific plane when disabling it or changing its
zpos.
This way, planes that are left untouched by a DRM atomic commit are
no longer disabled.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180717122522.11327-1-paul.kocialkowski@bootlin.com
Diffstat (limited to 'drivers/gpu/drm/sun4i/sun8i_mixer.c')
| -rw-r--r-- | drivers/gpu/drm/sun4i/sun8i_mixer.c | 15 |
1 files changed, 3 insertions, 12 deletions
diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index f76a5576c0e6..fc3713608f78 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -261,17 +261,6 @@ const struct de2_fmt_info *sun8i_mixer_format_info(u32 format) return NULL; } -static void sun8i_mixer_atomic_begin(struct sunxi_engine *engine, - struct drm_crtc_state *old_state) -{ - /* - * Disable all pipes at the beginning. They will be enabled - * again if needed in plane update callback. - */ - regmap_update_bits(engine->regs, SUN8I_MIXER_BLEND_PIPE_CTL, - SUN8I_MIXER_BLEND_PIPE_CTL_EN_MSK, 0); -} - static void sun8i_mixer_commit(struct sunxi_engine *engine) { DRM_DEBUG_DRIVER("Committing changes\n"); @@ -323,7 +312,6 @@ static struct drm_plane **sun8i_layers_init(struct drm_device *drm, } static const struct sunxi_engine_ops sun8i_engine_ops = { - .atomic_begin = sun8i_mixer_atomic_begin, .commit = sun8i_mixer_commit, .layers_init = sun8i_layers_init, }; @@ -494,6 +482,9 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master, regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_MODE(i), SUN8I_MIXER_BLEND_MODE_DEF); + regmap_update_bits(mixer->engine.regs, SUN8I_MIXER_BLEND_PIPE_CTL, + SUN8I_MIXER_BLEND_PIPE_CTL_EN_MSK, 0); + return 0; err_disable_bus_clk: |