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authorJohn Keeping <john@metanate.com>2017-02-24 15:55:03 +0300
committerSean Paul <seanpaul@chromium.org>2017-03-01 22:48:58 +0300
commitd790ad03ed3432839151bc54c611ec87df8bf896 (patch)
tree5454cb42b8a1470bc8f164db61dff7182a9793c3 /drivers/gpu/drm/rockchip/rockchip_drm_vop.c
parent2b0c4b70b1a4f6ad1810b62057b0d8208c3c65a8 (diff)
downloadlinux-d790ad03ed3432839151bc54c611ec87df8bf896.tar.xz
drm/rockchip: vop: test for P{H,V}SYNC
When connected to the MIPI DSI output, we need to use N{H,V}SYNC for the internal connection but these flags are meaningless for DSI panels. Switch the test so that we do not set the P{H,V}SYNC bits unless the mode requires it. Signed-off-by: John Keeping <john@metanate.com> Reviewed-by: Mark Yao <mark.yao@rock-chips.com> Reviewed-by: Sean Paul <seanpaul@chromium.org> [seanpaul resolved conflict using macros instead of hardcoded values] Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20170224125506.21533-21-john@metanate.com
Diffstat (limited to 'drivers/gpu/drm/rockchip/rockchip_drm_vop.c')
-rw-r--r--drivers/gpu/drm/rockchip/rockchip_drm_vop.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index 7c2e7c481333..94d7b7327ff7 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -932,10 +932,10 @@ static void vop_crtc_enable(struct drm_crtc *crtc)
}
pin_pol = BIT(DCLK_INVERT);
- pin_pol |= (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC) ?
- 0 : BIT(HSYNC_POSITIVE);
- pin_pol |= (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC) ?
- 0 : BIT(VSYNC_POSITIVE);
+ pin_pol |= (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) ?
+ BIT(HSYNC_POSITIVE) : 0;
+ pin_pol |= (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) ?
+ BIT(VSYNC_POSITIVE) : 0;
VOP_CTRL_SET(vop, pin_pol, pin_pol);
switch (s->output_type) {