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authorAlex Deucher <alexdeucher@gmail.com>2010-11-17 00:53:14 +0300
committerDave Airlie <airlied@redhat.com>2010-11-18 07:56:08 +0300
commitd33ef52d9db8a36900dd53f2e32db9a521ace259 (patch)
treeff100aa2020cf5801f8932a9456b16d84b281ee3 /drivers/gpu/drm/radeon
parent21e2eae4daaecf2f2a391e4f4b596c800f198edf (diff)
downloadlinux-d33ef52d9db8a36900dd53f2e32db9a521ace259.tar.xz
drm/radeon/kms: fix typo in r600 cs checker
Looks like a typo in: drm/radeon/r600: fix tiling issues in CS checker. (f30df2fad0c901e74ac9a52a488a54c69a373a41) Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon')
-rw-r--r--drivers/gpu/drm/radeon/r600_cs.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c
index 0f90fc3482ce..9bebac1ec006 100644
--- a/drivers/gpu/drm/radeon/r600_cs.c
+++ b/drivers/gpu/drm/radeon/r600_cs.c
@@ -315,7 +315,7 @@ static inline int r600_cs_track_validate_cb(struct radeon_cs_parser *p, int i)
if (array_mode == V_0280A0_ARRAY_LINEAR_GENERAL) {
/* the initial DDX does bad things with the CB size occasionally */
/* it rounds up height too far for slice tile max but the BO is smaller */
- tmp = (height - 7) * 8 * bpe;
+ tmp = (height - 7) * pitch * bpe;
if ((tmp + track->cb_color_bo_offset[i]) > radeon_bo_size(track->cb_color_bo[i])) {
dev_warn(p->dev, "%s offset[%d] %d %d %lu too big\n", __func__, i, track->cb_color_bo_offset[i], tmp, radeon_bo_size(track->cb_color_bo[i]));
return -EINVAL;