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author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-01-04 22:29:01 +0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-01-04 22:29:01 +0400 |
commit | 256601421f04b43913bf144dcc1d11ba88720987 (patch) | |
tree | 946ff662f0ffe1d2cc0d179c6cf8751b105d20bb /drivers/gpu/drm/radeon/sid.h | |
parent | 49569646b2413ee1a4fb7c4537fca058ac22292e (diff) | |
parent | eda85d6ad490923152544fba0473798b6cc0edf6 (diff) | |
download | linux-256601421f04b43913bf144dcc1d11ba88720987.tar.xz |
Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux
Pull radeon and minor nouveau fixes from Dave Airlie:
"Just a radeon pull from Alex, fixes a few regressions since 3.7 and
reworks some of the reset handling, and two minor nouveau fixes I
found on the list, Ben will be back next week to take care of the
couple of larger nouveau patches that I see outstanding."
* 'drm-next' of git://people.freedesktop.org/~airlied/linux:
drm/nouveau: fix init with agpgart-uninorth
drm: nouveau: Fix build warning seen if HWMON is undefined
drm/radeon: switch to a finer grained reset for SI (v2)
drm/radeon: switch to a finer grained reset for cayman/TN
drm/radeon: switch to a finer grained reset for evergreen
drm/radeon: switch to a finer grained reset for r6xx/7xx
drm/radeon: add GPU reset flags
drm/radeon: fix typo in evergreen dma fence
drm/radeon: Properly handle DDC probe for DP bridges
drm/radeon: reset dma engine on gpu reset (v2)
drm/radeon: print dma status reg on lockup (v2)
drm/radeon: improve ring debugfs printing
drm/radeon: add debugfs file for dma rings
drm/radeon/r6xx: fix DMA engine for ttm bo transfers
drm/radeon: add connector table for Mac G4 Silver
Diffstat (limited to 'drivers/gpu/drm/radeon/sid.h')
-rw-r--r-- | drivers/gpu/drm/radeon/sid.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/sid.h b/drivers/gpu/drm/radeon/sid.h index 62b46215d423..c056aae814f0 100644 --- a/drivers/gpu/drm/radeon/sid.h +++ b/drivers/gpu/drm/radeon/sid.h @@ -62,6 +62,22 @@ #define SRBM_STATUS 0xE50 +#define SRBM_SOFT_RESET 0x0E60 +#define SOFT_RESET_BIF (1 << 1) +#define SOFT_RESET_DC (1 << 5) +#define SOFT_RESET_DMA1 (1 << 6) +#define SOFT_RESET_GRBM (1 << 8) +#define SOFT_RESET_HDP (1 << 9) +#define SOFT_RESET_IH (1 << 10) +#define SOFT_RESET_MC (1 << 11) +#define SOFT_RESET_ROM (1 << 14) +#define SOFT_RESET_SEM (1 << 15) +#define SOFT_RESET_VMC (1 << 17) +#define SOFT_RESET_DMA (1 << 20) +#define SOFT_RESET_TST (1 << 21) +#define SOFT_RESET_REGBB (1 << 22) +#define SOFT_RESET_ORB (1 << 23) + #define CC_SYS_RB_BACKEND_DISABLE 0xe80 #define GC_USER_SYS_RB_BACKEND_DISABLE 0xe84 @@ -1013,6 +1029,8 @@ # define DATA_SWAP_ENABLE (1 << 3) # define FENCE_SWAP_ENABLE (1 << 4) # define CTXEMPTY_INT_ENABLE (1 << 28) +#define DMA_STATUS_REG 0xd034 +# define DMA_IDLE (1 << 0) #define DMA_TILING_CONFIG 0xd0b8 #define DMA_PACKET(cmd, b, t, s, n) ((((cmd) & 0xF) << 28) | \ |