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author | Alex Deucher <alexander.deucher@amd.com> | 2013-04-13 00:42:42 +0400 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2013-06-28 03:16:10 +0400 |
commit | 69e0b57a91adca2e3eb56ed4db39ab90f3ae1043 (patch) | |
tree | aa08ae87050d5e80c883367ce13fabf7bd32a742 /drivers/gpu/drm/radeon/rv770_smc.c | |
parent | d22b7e406a4032f9208207d80c1d515267b73358 (diff) | |
download | linux-69e0b57a91adca2e3eb56ed4db39ab90f3ae1043.tar.xz |
drm/radeon/kms: add dpm support for cayman (v5)
This adds dpm support for cayman asics. This includes:
- clockgating
- dynamic engine clock scaling
- dynamic memory clock scaling
- dynamic voltage scaling
- dynamic pcie gen1/gen2 switching (requires additional acpi support)
- power containment
- shader power scaling
Set radeon.dpm=1 to enable.
v2: fold in tdp fix
v3: fix indentation
v4: fix 64 bit div
v5: attempt to fix state enable
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/rv770_smc.c')
-rw-r--r-- | drivers/gpu/drm/radeon/rv770_smc.c | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/rv770_smc.c b/drivers/gpu/drm/radeon/rv770_smc.c index 0078c599248f..ab95da570215 100644 --- a/drivers/gpu/drm/radeon/rv770_smc.c +++ b/drivers/gpu/drm/radeon/rv770_smc.c @@ -254,6 +254,26 @@ static const u8 caicos_smc_int_vectors[] = 0x05, 0x0A, 0x05, 0x0A }; +static const u8 cayman_smc_int_vectors[] = +{ + 0x12, 0x05, 0x12, 0x05, + 0x12, 0x05, 0x12, 0x05, + 0x12, 0x05, 0x12, 0x05, + 0x12, 0x05, 0x12, 0x05, + 0x12, 0x05, 0x12, 0x05, + 0x12, 0x05, 0x12, 0x05, + 0x12, 0x05, 0x12, 0x05, + 0x12, 0x05, 0x12, 0x05, + 0x12, 0x05, 0x12, 0x05, + 0x12, 0x05, 0x12, 0x05, + 0x12, 0x05, 0x12, 0x05, + 0x12, 0x05, 0x12, 0x05, + 0x12, 0x05, 0x18, 0xEA, + 0x12, 0x20, 0x1C, 0x34, + 0x1C, 0x34, 0x08, 0x72, + 0x08, 0x72, 0x08, 0x72 +}; + int rv770_set_smc_sram_address(struct radeon_device *rdev, u16 smc_address, u16 limit) { @@ -544,6 +564,13 @@ int rv770_load_smc_ucode(struct radeon_device *rdev, int_vect_start_address = CAICOS_SMC_INT_VECTOR_START; int_vect_size = CAICOS_SMC_INT_VECTOR_SIZE; break; + case CHIP_CAYMAN: + ucode_start_address = CAYMAN_SMC_UCODE_START; + ucode_size = CAYMAN_SMC_UCODE_SIZE; + int_vect = (const u8 *)&cayman_smc_int_vectors; + int_vect_start_address = CAYMAN_SMC_INT_VECTOR_START; + int_vect_size = CAYMAN_SMC_INT_VECTOR_SIZE; + break; default: DRM_ERROR("unknown asic in smc ucode loader\n"); BUG(); |