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authorAlex Deucher <alexdeucher@gmail.com>2010-09-29 19:37:40 +0400
committerDave Airlie <airlied@redhat.com>2010-10-06 05:46:24 +0400
commitf28488c282d8916b9b6190cc41714815bbaf97d5 (patch)
tree66c000cb29f4da8317c9e12594691c319094f215 /drivers/gpu/drm/radeon/radeon_legacy_crtc.c
parentbcac54da0a6bd2ed93a2a70fe3d4ebc08c4ed779 (diff)
downloadlinux-f28488c282d8916b9b6190cc41714815bbaf97d5.tar.xz
drm/radeon/kms: remove some pll algo flags
These shouldn't be needed with the post div changes in the last patch. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_legacy_crtc.c')
-rw-r--r--drivers/gpu/drm/radeon/radeon_legacy_crtc.c5
1 files changed, 0 insertions, 5 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
index 305049afde15..d60b31982845 100644
--- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
@@ -722,11 +722,6 @@ static void radeon_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
else
pll->algo = PLL_ALGO_LEGACY;
- if (mode->clock > 200000) /* range limits??? */
- pll->flags |= RADEON_PLL_PREFER_HIGH_FB_DIV;
- else
- pll->flags |= RADEON_PLL_PREFER_LOW_REF_DIV;
-
list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
if (encoder->crtc == crtc) {
struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);