diff options
author | Alex Deucher <alexdeucher@gmail.com> | 2010-09-04 13:04:34 +0400 |
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committer | Dave Airlie <airlied@redhat.com> | 2010-10-06 05:38:08 +0400 |
commit | d0f8a854c340986359a3b0a97e380c71def7a440 (patch) | |
tree | 4f4065bb8c920badc92f56c25b5b105066ae6fc2 /drivers/gpu/drm/radeon/radeon_fence.c | |
parent | 724c80e1d630296d1324859e964d80d35007d83c (diff) | |
download | linux-d0f8a854c340986359a3b0a97e380c71def7a440.tar.xz |
drm/radeon/kms/r6xx+: use new style fencing (v3)
On r6xx+ a newer fence mechanism was implemented to replace
the old wait_until plus scratch regs setup. A single EOP event
will flush the destination caches, write a fence value, and generate
an interrupt. This is the recommended fence mechanism on r6xx+ asics.
This requires my previous writeback patch.
v2: fix typo that enabled event fence checking on all asics
rather than just r6xx+.
v3: properly enable EOP interrupts
Should fix:
https://bugs.freedesktop.org/show_bug.cgi?id=29972
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_fence.c')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_fence.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_fence.c b/drivers/gpu/drm/radeon/radeon_fence.c index 698a7ed3a6a1..216392d0353b 100644 --- a/drivers/gpu/drm/radeon/radeon_fence.c +++ b/drivers/gpu/drm/radeon/radeon_fence.c @@ -73,7 +73,11 @@ static bool radeon_fence_poll_locked(struct radeon_device *rdev) unsigned long cjiffies; if (rdev->wb.enabled) { - u32 scratch_index = RADEON_WB_SCRATCH_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base; + u32 scratch_index; + if (rdev->wb.use_event) + scratch_index = R600_WB_EVENT_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base; + else + scratch_index = RADEON_WB_SCRATCH_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base; seq = rdev->wb.wb[scratch_index/4]; } else seq = RREG32(rdev->fence_drv.scratch_reg); |