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| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-12-02 17:02:51 +0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2012-12-14 19:45:22 +0400 |
| commit | 2ef9bdfe64079c9d0b98dc89af3af52918b818a0 (patch) | |
| tree | d755083f2702b1ac6f2f8ed449d2e65d9e7e4582 /drivers/gpu/drm/radeon/radeon_cp.c | |
| parent | 9add1ac3dd256ad12e266f8403daf928be19953f (diff) | |
| download | linux-2ef9bdfe64079c9d0b98dc89af3af52918b818a0.tar.xz | |
drm/radeon: add W|RREG32_IDX for MM_INDEX|DATA based mmio accesss
Just refactoring to make the next patche simpler. Now all indirect register
access in the new modesetting driver should go through the r100_mm_(w|r)reg
fucntions.
RADEON_READ_MM from the old driver seems to be totally unused, so just kill
it.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_cp.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_cp.c | 14 |
1 files changed, 0 insertions, 14 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_cp.c b/drivers/gpu/drm/radeon/radeon_cp.c index 8b2797dc7b64..9143fc45e35b 100644 --- a/drivers/gpu/drm/radeon/radeon_cp.c +++ b/drivers/gpu/drm/radeon/radeon_cp.c @@ -116,20 +116,6 @@ u32 radeon_get_scratch(drm_radeon_private_t *dev_priv, int index) } } -u32 RADEON_READ_MM(drm_radeon_private_t *dev_priv, int addr) -{ - u32 ret; - - if (addr < 0x10000) - ret = DRM_READ32(dev_priv->mmio, addr); - else { - DRM_WRITE32(dev_priv->mmio, RADEON_MM_INDEX, addr); - ret = DRM_READ32(dev_priv->mmio, RADEON_MM_DATA); - } - - return ret; -} - static u32 R500_READ_MCIND(drm_radeon_private_t *dev_priv, int addr) { u32 ret; |