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| author | Alex Deucher <alexander.deucher@amd.com> | 2014-10-16 01:20:55 +0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2014-10-17 02:34:09 +0400 |
| commit | 8e66e134e20b936179ea1535dd4ed19ec4f99dba (patch) | |
| tree | 72d79bcfa0252136570760964444792ecfb17a5e /drivers/gpu/drm/radeon/r600_dpm.c | |
| parent | e300180f71037fd9ed1ca967006fd9f3ee466bcd (diff) | |
| download | linux-8e66e134e20b936179ea1535dd4ed19ec4f99dba.tar.xz | |
drm/radeon: fix vm page table block size calculation
The page offset is 12 bits. For example if we have an
8 GB VM, we'd need 33 bits. The number of bits needed
for PD + PT is 21 (33 - 12 or log2(8) + 18), not 20
(log2(8) + 17).
Noticed by Alexey during code review.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Diffstat (limited to 'drivers/gpu/drm/radeon/r600_dpm.c')
0 files changed, 0 insertions, 0 deletions