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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-12-23 06:47:37 +0300 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-12-23 06:47:37 +0300 |
| commit | e819eb8687767cefca7b6abf5ac6d5efcf581eeb (patch) | |
| tree | ef40a82ddbce3fe12b4205a87b5195e8e9fbb136 /drivers/gpu/drm/radeon/r600_cs.c | |
| parent | ca5f73a05ebfbf74ea9874d5eaad8d63d7e69b4f (diff) | |
| parent | 0f16830e9f6de0a44cf1e473ffa80cbe612d5beb (diff) | |
| download | linux-e819eb8687767cefca7b6abf5ac6d5efcf581eeb.tar.xz | |
Merge branch 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6:
drm: Include the connector name in the output_poll_execute() debug message
drm/radeon/kms: fix bug in r600_gpu_is_lockup
drm/radeon/kms: reorder display resume to avoid problems
drm/radeon/kms/evergreen: reset the grbm blocks at resume and init
drm/radeon/kms: fix evergreen asic reset
Revert "drm: Don't try and disable an encoder that was never enabled"
drm/radeon: Add early unregister of firmware fb's
drm/radeon: use aperture size not vram size for overlap tests
drm/radeon/kms/evergreen: flush hdp cache when flushing gart tlb
drm/radeon/kms: disable the r600 cb offset checker for linear surfaces
drm/radeon/kms: disable ss fixed ref divide
drm/i915/bios: Reverse order of 100/120 Mhz SSC clocks
agp/intel: Fix missed cached memory flags setting in i965_write_entry()
drm/i915/sdvo: Only use the SDVO pin if it is in the valid range
drm/i915/ringbuffer: Handle wrapping of the autoreported HEAD
drm/i915/dp: Fix I2C/EDID handling with active DisplayPort to DVI converter
Diffstat (limited to 'drivers/gpu/drm/radeon/r600_cs.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/r600_cs.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c index 0f90fc3482ce..7831e0890210 100644 --- a/drivers/gpu/drm/radeon/r600_cs.c +++ b/drivers/gpu/drm/radeon/r600_cs.c @@ -315,11 +315,10 @@ static inline int r600_cs_track_validate_cb(struct radeon_cs_parser *p, int i) if (array_mode == V_0280A0_ARRAY_LINEAR_GENERAL) { /* the initial DDX does bad things with the CB size occasionally */ /* it rounds up height too far for slice tile max but the BO is smaller */ - tmp = (height - 7) * 8 * bpe; - if ((tmp + track->cb_color_bo_offset[i]) > radeon_bo_size(track->cb_color_bo[i])) { - dev_warn(p->dev, "%s offset[%d] %d %d %lu too big\n", __func__, i, track->cb_color_bo_offset[i], tmp, radeon_bo_size(track->cb_color_bo[i])); - return -EINVAL; - } + /* r600c,g also seem to flush at bad times in some apps resulting in + * bogus values here. So for linear just allow anything to avoid breaking + * broken userspace. + */ } else { dev_warn(p->dev, "%s offset[%d] %d %d %lu too big\n", __func__, i, track->cb_color_bo_offset[i], tmp, radeon_bo_size(track->cb_color_bo[i])); return -EINVAL; |