diff options
author | Michel Dänzer <daenzer@vmware.com> | 2009-06-16 19:29:06 +0400 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2009-06-19 03:28:20 +0400 |
commit | 4e484e7dc5856ff5086b6329d82e36d4adaf1f02 (patch) | |
tree | ca8d91c03f89732c36f44b30d01927802f4fa767 /drivers/gpu/drm/radeon/r100.c | |
parent | 62369028c7e2039b821799b3db52f0d622f0e8b5 (diff) | |
download | linux-4e484e7dc5856ff5086b6329d82e36d4adaf1f02.tar.xz |
radeon: Fix CP byte order on big endian architectures with KMS.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/r100.c')
-rw-r--r-- | drivers/gpu/drm/radeon/r100.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index 8f41f701f0b7..64a692c0c319 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c @@ -551,6 +551,9 @@ int r100_cp_init(struct radeon_device *rdev, unsigned ring_size) /* cp setup */ WREG32(0x718, pre_write_timer | (pre_write_limit << 28)); WREG32(RADEON_CP_RB_CNTL, +#ifdef __BIG_ENDIAN + RADEON_BUF_SWAP_32BIT | +#endif REG_SET(RADEON_RB_BUFSZ, rb_bufsz) | REG_SET(RADEON_RB_BLKSZ, rb_blksz) | REG_SET(RADEON_MAX_FETCH, max_fetch) | |