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| author | Alex Deucher <alexander.deucher@amd.com> | 2012-07-21 01:13:13 +0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2013-06-27 00:11:37 +0400 |
| commit | cd84a27d188b0b5f53f5782d02695e7d25517afc (patch) | |
| tree | 2b1f29940727ce7546ed634d416dbd3dc414e0f9 /drivers/gpu/drm/radeon/cikd.h | |
| parent | bc19f59704ac33ea31b4fceb9d16ebec26dc3dd9 (diff) | |
| download | linux-cd84a27d188b0b5f53f5782d02695e7d25517afc.tar.xz | |
drm/radeon/dce8: add support for display watermark setup
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/cikd.h')
| -rw-r--r-- | drivers/gpu/drm/radeon/cikd.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/cikd.h b/drivers/gpu/drm/radeon/cikd.h index 39ed517499ad..3349e37a60ef 100644 --- a/drivers/gpu/drm/radeon/cikd.h +++ b/drivers/gpu/drm/radeon/cikd.h @@ -259,6 +259,17 @@ #define SDMA0 (1 << 10) #define SDMA1 (1 << 11) +/* 0x6b04, 0x7704, 0x10304, 0x10f04, 0x11b04, 0x12704 */ +#define LB_MEMORY_CTRL 0x6b04 +#define LB_MEMORY_SIZE(x) ((x) << 0) +#define LB_MEMORY_CONFIG(x) ((x) << 20) + +#define DPG_WATERMARK_MASK_CONTROL 0x6cc8 +# define LATENCY_WATERMARK_MASK(x) ((x) << 8) +#define DPG_PIPE_LATENCY_CONTROL 0x6ccc +# define LATENCY_LOW_WATERMARK(x) ((x) << 0) +# define LATENCY_HIGH_WATERMARK(x) ((x) << 16) + /* 0x6b24, 0x7724, 0x10324, 0x10f24, 0x11b24, 0x12724 */ #define LB_VLINE_STATUS 0x6b24 # define VLINE_OCCURRED (1 << 0) |