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author | Alex Deucher <alexander.deucher@amd.com> | 2014-11-18 23:07:33 +0300 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2014-11-20 21:00:13 +0300 |
commit | d967be9b80a5aa3ba228a9c2d3fea91ae99e4a07 (patch) | |
tree | 014bbc2021e963734885c31fc5b0963ecceb1df5 /drivers/gpu/drm/radeon/ci_dpm.c | |
parent | 7f6233ca8769a92cf4f23a0bc18bf241e9c50606 (diff) | |
download | linux-d967be9b80a5aa3ba228a9c2d3fea91ae99e4a07.tar.xz |
drm/radeon/ci: disable needless sclk changes
The current code always reprogrammed the sclk levels,
but we don't currently handle disp sclk requirements
so just skip it.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/ci_dpm.c')
-rw-r--r-- | drivers/gpu/drm/radeon/ci_dpm.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/ci_dpm.c b/drivers/gpu/drm/radeon/ci_dpm.c index 630434cba22d..3f898d020ae6 100644 --- a/drivers/gpu/drm/radeon/ci_dpm.c +++ b/drivers/gpu/drm/radeon/ci_dpm.c @@ -3809,7 +3809,7 @@ static void ci_find_dpm_states_clocks_in_dpm_table(struct radeon_device *rdev, pi->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_SCLK; } else { /* XXX check display min clock requirements */ - if (0 != CISLAND_MINIMUM_ENGINE_CLOCK) + if (CISLAND_MINIMUM_ENGINE_CLOCK != CISLAND_MINIMUM_ENGINE_CLOCK) pi->need_update_smu7_dpm_table |= DPMTABLE_UPDATE_SCLK; } |