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author | Ben Skeggs <bskeggs@redhat.com> | 2015-01-14 08:28:47 +0300 |
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committer | Ben Skeggs <bskeggs@redhat.com> | 2015-01-22 05:18:02 +0300 |
commit | 05c7145dae17a53b030238f477bf28211a21b736 (patch) | |
tree | 11fdcf3012cf4e9b650e6312cbbeb20e8e9d45c4 /drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.h | |
parent | 5b85057acc411ee146ee4b230c773272ccee464d (diff) | |
download | linux-05c7145dae17a53b030238f477bf28211a21b736.tar.xz |
drm/nouveau/fifo: namespace + nvidia gpu names (no binary change)
The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver. This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).
Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.
A comparison of objdump disassemblies proves no code changes.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.h')
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.h | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.h b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.h index 3a9ceb315c20..09ed93c66567 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.h +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.h @@ -1,36 +1,36 @@ #ifndef __NV50_FIFO_H__ #define __NV50_FIFO_H__ +#include <engine/fifo.h> struct nv50_fifo_priv { - struct nouveau_fifo base; - struct nouveau_gpuobj *playlist[2]; + struct nvkm_fifo base; + struct nvkm_gpuobj *playlist[2]; int cur_playlist; }; struct nv50_fifo_base { - struct nouveau_fifo_base base; - struct nouveau_gpuobj *ramfc; - struct nouveau_gpuobj *cache; - struct nouveau_gpuobj *eng; - struct nouveau_gpuobj *pgd; - struct nouveau_vm *vm; + struct nvkm_fifo_base base; + struct nvkm_gpuobj *ramfc; + struct nvkm_gpuobj *cache; + struct nvkm_gpuobj *eng; + struct nvkm_gpuobj *pgd; + struct nvkm_vm *vm; }; struct nv50_fifo_chan { - struct nouveau_fifo_chan base; + struct nvkm_fifo_chan base; u32 subc[8]; - struct nouveau_ramht *ramht; + struct nvkm_ramht *ramht; }; void nv50_fifo_playlist_update(struct nv50_fifo_priv *); -void nv50_fifo_object_detach(struct nouveau_object *, int); -void nv50_fifo_chan_dtor(struct nouveau_object *); -int nv50_fifo_chan_fini(struct nouveau_object *, bool); +void nv50_fifo_object_detach(struct nvkm_object *, int); +void nv50_fifo_chan_dtor(struct nvkm_object *); +int nv50_fifo_chan_fini(struct nvkm_object *, bool); -void nv50_fifo_context_dtor(struct nouveau_object *); - -void nv50_fifo_dtor(struct nouveau_object *); -int nv50_fifo_init(struct nouveau_object *); +void nv50_fifo_context_dtor(struct nvkm_object *); +void nv50_fifo_dtor(struct nvkm_object *); +int nv50_fifo_init(struct nvkm_object *); #endif |