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author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-05-21 22:14:52 +0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-05-21 22:14:52 +0400 |
commit | 59534f7298c5e28aaa64e6ed550e247f64ee72ae (patch) | |
tree | b9fef7756abf897d9e1b10950cdf10bf6dfe5cb7 /drivers/gpu/drm/nouveau/nv50_sor.c | |
parent | ac3ee84c604502240122c47b52f0542ec8774f15 (diff) | |
parent | b486787ee4797d6e42a9bd3a6f079385ad0f4472 (diff) | |
download | linux-59534f7298c5e28aaa64e6ed550e247f64ee72ae.tar.xz |
Merge branch 'drm-for-2.6.35' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-for-2.6.35' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (207 commits)
drm/radeon/kms/pm/r600: select the mid clock mode for single head low profile
drm/radeon: fix power supply kconfig interaction.
drm/radeon/kms: record object that have been list reserved
drm/radeon: AGP memory is only I/O if the aperture can be mapped by the CPU.
drm/radeon/kms: don't default display priority to high on rs4xx
drm/edid: fix typo in 1600x1200@75 mode
drm/nouveau: fix i2c-related init table handlers
drm/nouveau: support init table i2c device identifier 0x81
drm/nouveau: ensure we've parsed i2c table entry for INIT_*I2C* handlers
drm/nouveau: display error message for any failed init table opcode
drm/nouveau: fix init table handlers to return proper error codes
drm/nv50: support fractional feedback divider on newer chips
drm/nv50: fix monitor detection on certain chipsets
drm/nv50: store full dcb i2c entry from vbios
drm/nv50: fix suspend/resume with DP outputs
drm/nv50: output calculated crtc pll when debugging on
drm/nouveau: dump pll limits entries when debugging is on
drm/nouveau: bios parser fixes for eDP boards
drm/nouveau: fix a nouveau_bo dereference after it's been destroyed
drm/nv40: remove some completed ctxprog TODOs
...
Diffstat (limited to 'drivers/gpu/drm/nouveau/nv50_sor.c')
-rw-r--r-- | drivers/gpu/drm/nouveau/nv50_sor.c | 15 |
1 files changed, 10 insertions, 5 deletions
diff --git a/drivers/gpu/drm/nouveau/nv50_sor.c b/drivers/gpu/drm/nouveau/nv50_sor.c index 0c68698f23df..b11eaf9c5c7c 100644 --- a/drivers/gpu/drm/nouveau/nv50_sor.c +++ b/drivers/gpu/drm/nouveau/nv50_sor.c @@ -321,18 +321,23 @@ nv50_sor_create(struct drm_device *dev, struct dcb_entry *entry) encoder->possible_clones = 0; if (nv_encoder->dcb->type == OUTPUT_DP) { - uint32_t mc, or = nv_encoder->or; + int or = nv_encoder->or, link = !(entry->dpconf.sor.link & 1); + uint32_t tmp; if (dev_priv->chipset < 0x90 || dev_priv->chipset == 0x92 || dev_priv->chipset == 0xa0) - mc = nv_rd32(dev, NV50_PDISPLAY_SOR_MODE_CTRL_C(or)); + tmp = nv_rd32(dev, NV50_PDISPLAY_SOR_MODE_CTRL_C(or)); else - mc = nv_rd32(dev, NV90_PDISPLAY_SOR_MODE_CTRL_C(or)); + tmp = nv_rd32(dev, NV90_PDISPLAY_SOR_MODE_CTRL_C(or)); - switch ((mc & 0x00000f00) >> 8) { + switch ((tmp & 0x00000f00) >> 8) { case 8: case 9: - nv_encoder->dp.mc_unknown = (mc & 0x000f0000) >> 16; + nv_encoder->dp.mc_unknown = (tmp & 0x000f0000) >> 16; + tmp = nv_rd32(dev, NV50_SOR_DP_CTRL(or, link)); + nv_encoder->dp.unk0 = tmp & 0x000001fc; + tmp = nv_rd32(dev, NV50_SOR_DP_UNK128(or, link)); + nv_encoder->dp.unk1 = tmp & 0x010f7f3f; break; default: break; |