diff options
| author | Ben Skeggs <bskeggs@redhat.com> | 2012-05-01 04:14:07 +0400 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2012-05-24 10:56:00 +0400 |
| commit | 67b342efc761046a22b73c327837479b58613a41 (patch) | |
| tree | 86a7d34699e48b855a8a99d8aaab3465cd2f8cd3 /drivers/gpu/drm/nouveau/nv10_fifo.c | |
| parent | 906c033e276877c1374c9159976b05746af3c86d (diff) | |
| download | linux-67b342efc761046a22b73c327837479b58613a41.tar.xz | |
drm/nouveau/fifo: remove all the "special" engine hooks
All the places this stuff is actually needed tends to be chipset-specific
anyway, so we're able to just inline the register bashing instead.
The parts of the common code that still directly touch PFIFO temporarily
have conditionals, these will be removed in subsequent commits that will
refactor the fifo modules into engine modules like graph/mpeg etc.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nv10_fifo.c')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nv10_fifo.c | 14 |
1 files changed, 4 insertions, 10 deletions
diff --git a/drivers/gpu/drm/nouveau/nv10_fifo.c b/drivers/gpu/drm/nouveau/nv10_fifo.c index d2ecbff4bee1..476451c6f961 100644 --- a/drivers/gpu/drm/nouveau/nv10_fifo.c +++ b/drivers/gpu/drm/nouveau/nv10_fifo.c @@ -33,13 +33,6 @@ #define NV10_RAMFC__SIZE ((dev_priv->chipset) >= 0x17 ? 64 : 32) int -nv10_fifo_channel_id(struct drm_device *dev) -{ - return nv_rd32(dev, NV03_PFIFO_CACHE1_PUSH1) & - NV10_PFIFO_CACHE1_PUSH1_CHID_MASK; -} - -int nv10_fifo_create_context(struct nouveau_channel *chan) { struct drm_nouveau_private *dev_priv = chan->dev->dev_private; @@ -139,7 +132,7 @@ nv10_fifo_unload_context(struct drm_device *dev) uint32_t fc, tmp; int chid; - chid = pfifo->channel_id(dev); + chid = nv_rd32(dev, NV03_PFIFO_CACHE1_PUSH1) & 0x1f; if (chid < 0 || chid >= dev_priv->engine.fifo.channels) return 0; fc = NV10_RAMFC(chid); @@ -232,8 +225,9 @@ nv10_fifo_init(struct drm_device *dev) nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, pfifo->channels - 1); nv10_fifo_init_intr(dev); - pfifo->enable(dev); - pfifo->reassign(dev, true); + nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH0, 1); + nv_wr32(dev, NV04_PFIFO_CACHE1_PULL0, 1); + nv_wr32(dev, NV03_PFIFO_CACHES, 1); for (i = 0; i < dev_priv->engine.fifo.channels; i++) { if (dev_priv->channels.ptr[i]) { |