diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2012-07-20 02:17:34 +0400 |
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committer | Ben Skeggs <bskeggs@redhat.com> | 2012-10-03 07:12:56 +0400 |
commit | ebb945a94bba2ce8dff7b0942ff2b3f2a52a0a69 (patch) | |
tree | 07cad59be501458e6ae1304b7c0352e322ac3387 /drivers/gpu/drm/nouveau/nouveau_software.h | |
parent | ac1499d9573f4aadd1d2beac11fe23af8ce90c24 (diff) | |
download | linux-ebb945a94bba2ce8dff7b0942ff2b3f2a52a0a69.tar.xz |
drm/nouveau: port all engines to new engine module format
This is a HUGE commit, but it's not nearly as bad as it looks - any problems
can be isolated to a particular chipset and engine combination. It was
simply too difficult to port each one at a time, the compat layers are
*already* ridiculous.
Most of the changes here are simply to the glue, the process for each of the
engine modules was to start with a standard skeleton and copy+paste the old
code into the appropriate places, fixing up variable names etc as needed.
v2: Marcin Slusarz <marcin.slusarz@gmail.com>
- fix find/replace bug in license header
v3: Ben Skeggs <bskeggs@redhat.com>
- bump indirect pushbuf size to 8KiB, 4KiB barely enough for userspace and
left no space for kernel's requirements during GEM pushbuf submission.
- fix duplicate assignments noticed by clang
v4: Marcin Slusarz <marcin.slusarz@gmail.com>
- add sparse annotations to nv04_fifo_pause/nv04_fifo_start
- use ioread32_native/iowrite32_native for fifo control registers
v5: Ben Skeggs <bskeggs@redhat.com>
- rebase on v3.6-rc4, modified to keep copy engine fix intact
- nv10/fence: unmap fence bo before destroying
- fixed fermi regression when using nvidia gr fuc
- fixed typo in supported dma_mask checking
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_software.h')
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_software.h | 60 |
1 files changed, 0 insertions, 60 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_software.h b/drivers/gpu/drm/nouveau/nouveau_software.h deleted file mode 100644 index 2105a9eef52c..000000000000 --- a/drivers/gpu/drm/nouveau/nouveau_software.h +++ /dev/null @@ -1,60 +0,0 @@ -#ifndef __NOUVEAU_SOFTWARE_H__ -#define __NOUVEAU_SOFTWARE_H__ - -#include "nouveau_fence.h" - -struct nouveau_software_priv { - struct nouveau_exec_engine base; - struct list_head vblank; - spinlock_t peephole_lock; -}; - -struct nouveau_software_chan { - int (*flip)(void *data); - void *flip_data; - - struct { - struct list_head list; - u32 channel; - u32 ctxdma; - u32 offset; - u32 value; - u32 head; - } vblank; -}; - -static inline void -nouveau_software_context_new(struct nouveau_channel *chan, - struct nouveau_software_chan *pch) -{ - pch->flip = nouveau_flip_complete; - pch->flip_data = chan; -} - -static inline void -nouveau_software_create(struct nouveau_software_priv *psw) -{ - INIT_LIST_HEAD(&psw->vblank); - spin_lock_init(&psw->peephole_lock); -} - -static inline u16 -nouveau_software_class(struct drm_device *dev) -{ - struct drm_nouveau_private *dev_priv = dev->dev_private; - if (dev_priv->card_type <= NV_04) - return 0x006e; - if (dev_priv->card_type <= NV_40) - return 0x016e; - if (dev_priv->card_type <= NV_50) - return 0x506e; - if (dev_priv->card_type <= NV_E0) - return 0x906e; - return 0x0000; -} - -int nv04_software_create(struct drm_device *); -int nv50_software_create(struct drm_device *); -int nvc0_software_create(struct drm_device *); - -#endif |