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author | Ben Skeggs <bskeggs@redhat.com> | 2020-07-20 04:19:14 +0300 |
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committer | Ben Skeggs <bskeggs@redhat.com> | 2020-07-24 11:51:04 +0300 |
commit | 60cdadace3208001b4e24a1a4b102f767d5df3c2 (patch) | |
tree | 89c4763e80e0a3287239462f54808f13247159e7 /drivers/gpu/drm/nouveau/nouveau_dma.h | |
parent | c47fceca2ef3718cee09bbf2941de44b3701c873 (diff) | |
download | linux-60cdadace3208001b4e24a1a4b102f767d5df3c2.tar.xz |
drm/nouveau/fence: use NVIDIA's headers for emit()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_dma.h')
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_dma.h | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_dma.h b/drivers/gpu/drm/nouveau/nouveau_dma.h index 3f86cdff927f..ebe63396ff8b 100644 --- a/drivers/gpu/drm/nouveau/nouveau_dma.h +++ b/drivers/gpu/drm/nouveau/nouveau_dma.h @@ -104,7 +104,6 @@ WIND_RING(struct nouveau_channel *chan) } /* FIFO methods */ -#define NV01_SUBCHAN_OBJECT 0x00000000 #define NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH 0x00000010 #define NV84_SUBCHAN_SEMAPHORE_ADDRESS_LOW 0x00000014 #define NV84_SUBCHAN_SEMAPHORE_SEQUENCE 0x00000018 @@ -113,14 +112,10 @@ WIND_RING(struct nouveau_channel *chan) #define NV84_SUBCHAN_SEMAPHORE_TRIGGER_WRITE_LONG 0x00000002 #define NV84_SUBCHAN_SEMAPHORE_TRIGGER_ACQUIRE_GEQUAL 0x00000004 #define NVC0_SUBCHAN_SEMAPHORE_TRIGGER_YIELD 0x00001000 -#define NV84_SUBCHAN_UEVENT 0x00000020 -#define NV84_SUBCHAN_WRCACHE_FLUSH 0x00000024 -#define NV10_SUBCHAN_REF_CNT 0x00000050 #define NV11_SUBCHAN_DMA_SEMAPHORE 0x00000060 #define NV11_SUBCHAN_SEMAPHORE_OFFSET 0x00000064 #define NV11_SUBCHAN_SEMAPHORE_ACQUIRE 0x00000068 #define NV11_SUBCHAN_SEMAPHORE_RELEASE 0x0000006c -#define NV40_SUBCHAN_YIELD 0x00000080 /* NV_SW object class */ #define NV_SW_DMA_VBLSEM 0x0000018c |