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authorBen Skeggs <bskeggs@redhat.com>2015-01-14 08:10:40 +0300
committerBen Skeggs <bskeggs@redhat.com>2015-01-22 05:17:57 +0300
commit21b137916ec25a507dbf7b6fe8b353fe9dc723c0 (patch)
tree4aa7f6194178e4a9ee6f2e174d775dce627b5ab1 /drivers/gpu/drm/nouveau/include
parent42594600095f03244a674fecdd2b5f6da2441180 (diff)
downloadlinux-21b137916ec25a507dbf7b6fe8b353fe9dc723c0.tar.xz
drm/nouveau/pmu: namespace + nvidia gpu names (no binary change)
The namespace of NVKM is being changed to nvkm_ instead of nouveau_, which will be used for the DRM part of the driver. This is being done in order to make it very clear as to what part of the driver a given symbol belongs to, and as a minor step towards splitting the DRM driver out to be able to stand on its own (for virt). Because there's already a large amount of churn here anyway, this is as good a time as any to also switch to NVIDIA's device and chipset naming to ease collaboration with them. A comparison of objdump disassemblies proves no code changes. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/include')
-rw-r--r--drivers/gpu/drm/nouveau/include/nvkm/core/os.h4
-rw-r--r--drivers/gpu/drm/nouveau/include/nvkm/subdev/pmu.h56
2 files changed, 30 insertions, 30 deletions
diff --git a/drivers/gpu/drm/nouveau/include/nvkm/core/os.h b/drivers/gpu/drm/nouveau/include/nvkm/core/os.h
index 423086564735..625d390d4c22 100644
--- a/drivers/gpu/drm/nouveau/include/nvkm/core/os.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/core/os.h
@@ -209,6 +209,10 @@
#define nouveau_volt nvkm_volt
#define nouveau_timer nvkm_timer
#define nouveau_timer_wait_eq nvkm_timer_wait_eq
+#define nouveau_timer_alarm nvkm_timer_alarm
+#define nouveau_alarm nvkm_alarm
+#define nouveau_timer_alarm_cancel nvkm_timer_alarm_cancel
+#define nouveau_alarm_init nvkm_alarm_init
#define nva3_pll_calc gt215_pll_calc
#define nouveau_clk nvkm_clk
#define nouveau_domain nvkm_domain
diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/pmu.h b/drivers/gpu/drm/nouveau/include/nvkm/subdev/pmu.h
index c890a4fb3cbb..7b86acc634a0 100644
--- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/pmu.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/pmu.h
@@ -1,11 +1,9 @@
-#ifndef __NOUVEAU_PMU_H__
-#define __NOUVEAU_PMU_H__
-
+#ifndef __NVKM_PMU_H__
+#define __NVKM_PMU_H__
#include <core/subdev.h>
-#include <core/device.h>
-struct nouveau_pmu {
- struct nouveau_subdev base;
+struct nvkm_pmu {
+ struct nvkm_subdev base;
struct {
u32 base;
@@ -23,35 +21,33 @@ struct nouveau_pmu {
u32 data[2];
} recv;
- int (*message)(struct nouveau_pmu *, u32[2], u32, u32, u32, u32);
- void (*pgob)(struct nouveau_pmu *, bool);
+ int (*message)(struct nvkm_pmu *, u32[2], u32, u32, u32, u32);
+ void (*pgob)(struct nvkm_pmu *, bool);
};
-static inline struct nouveau_pmu *
-nouveau_pmu(void *obj)
+static inline struct nvkm_pmu *
+nvkm_pmu(void *obj)
{
- return (void *)nouveau_subdev(obj, NVDEV_SUBDEV_PMU);
+ return (void *)nvkm_subdev(obj, NVDEV_SUBDEV_PMU);
}
-extern struct nouveau_oclass *nva3_pmu_oclass;
-extern struct nouveau_oclass *nvc0_pmu_oclass;
-extern struct nouveau_oclass *nvd0_pmu_oclass;
-extern struct nouveau_oclass *gk104_pmu_oclass;
-extern struct nouveau_oclass *nv108_pmu_oclass;
-extern struct nouveau_oclass *gk20a_pmu_oclass;
+extern struct nvkm_oclass *gt215_pmu_oclass;
+extern struct nvkm_oclass *gf100_pmu_oclass;
+extern struct nvkm_oclass *gf110_pmu_oclass;
+extern struct nvkm_oclass *gk104_pmu_oclass;
+extern struct nvkm_oclass *gk208_pmu_oclass;
+extern struct nvkm_oclass *gk20a_pmu_oclass;
/* interface to MEMX process running on PMU */
-struct nouveau_memx;
-int nouveau_memx_init(struct nouveau_pmu *, struct nouveau_memx **);
-int nouveau_memx_fini(struct nouveau_memx **, bool exec);
-void nouveau_memx_wr32(struct nouveau_memx *, u32 addr, u32 data);
-void nouveau_memx_wait(struct nouveau_memx *,
- u32 addr, u32 mask, u32 data, u32 nsec);
-void nouveau_memx_nsec(struct nouveau_memx *, u32 nsec);
-void nouveau_memx_wait_vblank(struct nouveau_memx *);
-void nouveau_memx_train(struct nouveau_memx *);
-int nouveau_memx_train_result(struct nouveau_pmu *, u32 *, int);
-void nouveau_memx_block(struct nouveau_memx *);
-void nouveau_memx_unblock(struct nouveau_memx *);
-
+struct nvkm_memx;
+int nvkm_memx_init(struct nvkm_pmu *, struct nvkm_memx **);
+int nvkm_memx_fini(struct nvkm_memx **, bool exec);
+void nvkm_memx_wr32(struct nvkm_memx *, u32 addr, u32 data);
+void nvkm_memx_wait(struct nvkm_memx *, u32 addr, u32 mask, u32 data, u32 nsec);
+void nvkm_memx_nsec(struct nvkm_memx *, u32 nsec);
+void nvkm_memx_wait_vblank(struct nvkm_memx *);
+void nvkm_memx_train(struct nvkm_memx *);
+int nvkm_memx_train_result(struct nvkm_pmu *, u32 *, int);
+void nvkm_memx_block(struct nvkm_memx *);
+void nvkm_memx_unblock(struct nvkm_memx *);
#endif