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| author | Ben Skeggs <bskeggs@redhat.com> | 2020-07-20 00:56:31 +0300 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2020-07-24 11:51:03 +0300 |
| commit | 6162638e196f8cf46cc63cb0f5327f7c6ae7d62b (patch) | |
| tree | f09565b253391c64c42d2f9442b8210693ecc29f /drivers/gpu/drm/nouveau/dispnv50/crcc37d.c | |
| parent | c854bf9464500d195f1a1a2c79ef887291b9300b (diff) | |
| download | linux-6162638e196f8cf46cc63cb0f5327f7c6ae7d62b.tar.xz | |
drm/nouveau/kms/nv50-: use NVIDIA's headers for core crc_set_src()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/dispnv50/crcc37d.c')
| -rw-r--r-- | drivers/gpu/drm/nouveau/dispnv50/crcc37d.c | 22 |
1 files changed, 13 insertions, 9 deletions
diff --git a/drivers/gpu/drm/nouveau/dispnv50/crcc37d.c b/drivers/gpu/drm/nouveau/dispnv50/crcc37d.c index dd818931db09..fe68e57c5c83 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/crcc37d.c +++ b/drivers/gpu/drm/nouveau/dispnv50/crcc37d.c @@ -8,6 +8,8 @@ #include <nvif/push507c.h> +#include <nvhw/class/clc37d.h> + #define CRCC37D_MAX_ENTRIES 2047 struct crcc37d_notifier { @@ -39,21 +41,23 @@ crcc37d_set_src(struct nv50_head *head, int or, { struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push; const int i = head->base.index; - u32 crc_args; + u32 crc_args = NVVAL(NVC37D, HEAD_SET_CRC_CONTROL, CONTROLLING_CHANNEL, wndw) | + NVDEF(NVC37D, HEAD_SET_CRC_CONTROL, EXPECT_BUFFER_COLLAPSE, FALSE) | + NVDEF(NVC37D, HEAD_SET_CRC_CONTROL, SECONDARY_CRC, NONE) | + NVDEF(NVC37D, HEAD_SET_CRC_CONTROL, CRC_DURING_SNOOZE, DISABLE); int ret; switch (source) { case NV50_CRC_SOURCE_TYPE_SOR: - crc_args = (0x00000050 + or) << 12; + crc_args |= NVDEF(NVC37D, HEAD_SET_CRC_CONTROL, PRIMARY_CRC, SOR(or)); break; case NV50_CRC_SOURCE_TYPE_PIOR: - crc_args = (0x00000060 + or) << 12; + crc_args |= NVDEF(NVC37D, HEAD_SET_CRC_CONTROL, PRIMARY_CRC, PIOR(or)); break; case NV50_CRC_SOURCE_TYPE_SF: - crc_args = 0x00000030 << 12; + crc_args |= NVDEF(NVC37D, HEAD_SET_CRC_CONTROL, PRIMARY_CRC, SF); break; default: - crc_args = 0; break; } @@ -61,11 +65,11 @@ crcc37d_set_src(struct nv50_head *head, int or, return ret; if (source) { - PUSH_NVSQ(push, NVC37D, 0x2180 + (i * 0x400), ctx->ntfy.handle); - PUSH_NVSQ(push, NVC37D, 0x2184 + (i * 0x400), crc_args | wndw); + PUSH_MTHD(push, NVC37D, HEAD_SET_CONTEXT_DMA_CRC(i), ctx->ntfy.handle); + PUSH_MTHD(push, NVC37D, HEAD_SET_CRC_CONTROL(i), crc_args); } else { - PUSH_NVSQ(push, NVC37D, 0x2184 + (i * 0x400), 0); - PUSH_NVSQ(push, NVC37D, 0x2180 + (i * 0x400), 0); + PUSH_MTHD(push, NVC37D, HEAD_SET_CRC_CONTROL(i), 0); + PUSH_MTHD(push, NVC37D, HEAD_SET_CONTEXT_DMA_CRC(i), 0); } return 0; |