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authorJordan Crouse <jcrouse@codeaurora.org>2016-11-28 22:28:31 +0300
committerRob Clark <robdclark@gmail.com>2016-11-28 23:14:13 +0300
commit89d777a572459d6ea726b609838beaef0c1b94a7 (patch)
tree9cae8205ec1fc321aa3a61736bf1d9dc486b9bbb /drivers/gpu/drm/msm/msm_gpu.h
parent05b9401bee13da14ea3d0b17eda6f0f89f6d455e (diff)
downloadlinux-89d777a572459d6ea726b609838beaef0c1b94a7.tar.xz
drm/msm: Remove 'src_clk' from adreno configuration
The adreno code inherited a silly workaround from downstream from the bad old days before decent clock control. grp_clk[0] (named 'src_clk') doesn't actually exist - it was used as a proxy for whatever the core clock actually was (usually 'core_clk'). All targets should be able to correctly request 'core_clk' and get the right thing back so zap the anachronism and directly use grp_clk[0] to control the clock rate. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Diffstat (limited to 'drivers/gpu/drm/msm/msm_gpu.h')
-rw-r--r--drivers/gpu/drm/msm/msm_gpu.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h
index c4c39d3272c7..10252d07bb14 100644
--- a/drivers/gpu/drm/msm/msm_gpu.h
+++ b/drivers/gpu/drm/msm/msm_gpu.h
@@ -103,7 +103,7 @@ struct msm_gpu {
/* Power Control: */
struct regulator *gpu_reg, *gpu_cx;
- struct clk *ebi1_clk, *grp_clks[6];
+ struct clk *ebi1_clk, *grp_clks[5];
uint32_t fast_rate, slow_rate, bus_freq;
#ifdef DOWNSTREAM_CONFIG_MSM_BUS_SCALING