diff options
| author | Neil Armstrong <narmstrong@baylibre.com> | 2018-11-06 13:54:35 +0300 |
|---|---|---|
| committer | Neil Armstrong <narmstrong@baylibre.com> | 2018-11-27 18:39:49 +0300 |
| commit | ff217bc710e09360187ab5dd7d704f871c29e006 (patch) | |
| tree | 6979baf6b5edd50e44e5620be6fb415fe8d89b6f /drivers/gpu/drm/meson/meson_vclk.h | |
| parent | 5d0bfe448481c9c109f5052c4ad36ef855aedc4f (diff) | |
| download | linux-ff217bc710e09360187ab5dd7d704f871c29e006.tar.xz | |
drm/meson: Add support for VIC alternate timings
This change is an attempt to handle the alternate clock for the CEA mode.
60Hz vs. 59.94Hz, 30Hz vs 29.97Hz or 24Hz vs 23.97Hz on the Amlogic Meson SoC
DRM Driver pixel clock generation.
The actual clock generation will be moved to the Common Clock framework once
all the video clock are handled by the Amlogic Meson SoC clock driver,
then these alternate timings will be handled in the same time in a cleaner
fashion.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Maxime Jourdan <mjourdan@baylibre.com>
[narmstrong: fix maybe-uninitialized warnings after applying]
Link: https://patchwork.freedesktop.org/patch/msgid/1541501675-3928-1-git-send-email-narmstrong@baylibre.com
Diffstat (limited to 'drivers/gpu/drm/meson/meson_vclk.h')
| -rw-r--r-- | drivers/gpu/drm/meson/meson_vclk.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/meson/meson_vclk.h b/drivers/gpu/drm/meson/meson_vclk.h index 869fa3a3073e..4bd8752da02a 100644 --- a/drivers/gpu/drm/meson/meson_vclk.h +++ b/drivers/gpu/drm/meson/meson_vclk.h @@ -32,6 +32,8 @@ enum { enum drm_mode_status meson_vclk_dmt_supported_freq(struct meson_drm *priv, unsigned int freq); +enum drm_mode_status +meson_vclk_vic_supported_freq(unsigned int freq); void meson_vclk_setup(struct meson_drm *priv, unsigned int target, unsigned int vclk_freq, unsigned int venc_freq, |