summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/lib
diff options
context:
space:
mode:
authorImre Deak <imre.deak@intel.com>2019-04-25 21:52:52 +0300
committerImre Deak <imre.deak@intel.com>2019-05-02 17:15:09 +0300
commitbd60a562906b2dfa6db4e9165c1498ea25db0587 (patch)
treef179c259905bccc94b368ef3d82f11446be7e5ce /drivers/gpu/drm/lib
parent3904fb78a80da64d7fd1a4f270725a6d4272c86f (diff)
downloadlinux-bd60a562906b2dfa6db4e9165c1498ea25db0587.tar.xz
drm/i915/icl: Factor out combo PHY lane power setup helper
Factor out the combo PHY lane power configuration code to a separate helper; it will be also needed by the next patch adding the same configuration for DDI ports. Add support for DDI ports and lane reversal as preparation for the next patch. The PWR_DOWN_LN_1 value is unspecified in the BSpec register description so remove it. v2: - Fix up the wrong assumption that the encodings are the same for DDI and DSI ports. (Jani) v3: - Use intel_ instead of icl_ prefix. (Jani) - Add required headers to intel_combo_phy.h after the upstream header refactoring. Cc: Jani Nikula <jani.nikula@intel.com> Cc: Madhav Chauhan <madhav.chauhan@intel.com> Cc: Ville Syrjala <ville.syrjala@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> (v2) Link: https://patchwork.freedesktop.org/patch/msgid/20190425185253.3197-1-imre.deak@intel.com
Diffstat (limited to 'drivers/gpu/drm/lib')
0 files changed, 0 insertions, 0 deletions