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authorOscar Mateo <oscar.mateo@intel.com>2014-07-24 20:04:31 +0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-08-12 01:06:58 +0400
commit73d477f6bb17a1f14c4897a4b4a6597fe9a38ad2 (patch)
tree316caf37f37d512b98aeeec3fd2b8e8d926900ae /drivers/gpu/drm/i915/intel_ringbuffer.h
parent9832b9dae8f9f505c7ed898a043b4f54b54597ed (diff)
downloadlinux-73d477f6bb17a1f14c4897a4b4a6597fe9a38ad2.tar.xz
drm/i915/bdw: Interrupts with logical rings
We need to attend context switch interrupts from all rings. Also, fixed writing IMR/IER and added HWSTAM at ring init time. Notice that, if added to irq_enable_mask, the context switch interrupts would be incorrectly masked out when the user interrupts are due to no users waiting on a sequence number. Therefore, this commit adds a bitmask of interrupts to be kept unmasked at all times. v2: Disable HWSTAM, as suggested by Damien (nobody listens to these interrupts, anyway). v3: Add new get/put_irq functions. Signed-off-by: Thomas Daniel <thomas.daniel@intel.com> (v1) Signed-off-by: Oscar Mateo <oscar.mateo@intel.com> (v2 & v3) Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> [danvet: Drop the GEN8_ prefix from the context switch interrupt define and move it to its brethren.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ringbuffer.h')
-rw-r--r--drivers/gpu/drm/i915/intel_ringbuffer.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index e497837c7724..cb529ee10c8f 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -224,6 +224,7 @@ struct intel_engine_cs {
} semaphore;
/* Execlists */
+ u32 irq_keep_mask; /* bitmask for interrupts that should not be masked */
int (*emit_request)(struct intel_ringbuffer *ringbuf);
int (*emit_flush)(struct intel_ringbuffer *ringbuf,
u32 invalidate_domains,