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authorTvrtko Ursulin <tvrtko.ursulin@intel.com>2016-06-29 18:09:29 +0300
committerTvrtko Ursulin <tvrtko.ursulin@intel.com>2016-06-30 19:20:45 +0300
commit1b9e665064c6fad91f4265743555406f5804dbcb (patch)
treef03aa5466e937edf8dd42f4ba85af2c64b6b361c /drivers/gpu/drm/i915/intel_ringbuffer.c
parentdb3d4019abaa3a52e66a86fc938a8315f8c4200a (diff)
downloadlinux-1b9e665064c6fad91f4265743555406f5804dbcb.tar.xz
drm/i915: Compact Gen8 semaphore initialization
Replace the macro initializer with a programatic loop which results in smaller code and hopefully just as clear. v2: Rebase. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ringbuffer.c')
-rw-r--r--drivers/gpu/drm/i915/intel_ringbuffer.c16
1 files changed, 14 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 0af8bb1c0a68..aef6824b4c75 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2888,7 +2888,7 @@ static void intel_ring_init_semaphores(struct drm_i915_private *dev_priv,
struct intel_engine_cs *engine)
{
struct drm_i915_gem_object *obj;
- int ret;
+ int ret, i;
if (!i915_semaphore_is_enabled(dev_priv))
return;
@@ -2915,9 +2915,21 @@ static void intel_ring_init_semaphores(struct drm_i915_private *dev_priv,
return;
if (INTEL_GEN(dev_priv) >= 8) {
+ u64 offset = i915_gem_obj_ggtt_offset(dev_priv->semaphore_obj);
+
engine->semaphore.sync_to = gen8_ring_sync;
engine->semaphore.signal = gen8_xcs_signal;
- GEN8_RING_SEMAPHORE_INIT(engine);
+
+ for (i = 0; i < I915_NUM_ENGINES; i++) {
+ u64 ring_offset;
+
+ if (i != engine->id)
+ ring_offset = offset + GEN8_SEMAPHORE_OFFSET(engine->id, i);
+ else
+ ring_offset = MI_SEMAPHORE_SYNC_INVALID;
+
+ engine->semaphore.signal_ggtt[i] = ring_offset;
+ }
} else if (INTEL_GEN(dev_priv) >= 6) {
engine->semaphore.sync_to = gen6_ring_sync;
engine->semaphore.signal = gen6_signal;