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| author | Tim Gore <tim.gore@intel.com> | 2015-10-26 13:48:58 +0300 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2015-10-29 16:39:15 +0300 |
| commit | cbdc12a9fc9d273a648e94eeee6794646f0158f2 (patch) | |
| tree | 5a10cfb14f6fab5fc32dc40b5efb0bad93c6f488 /drivers/gpu/drm/i915/intel_pm.c | |
| parent | 8b10c0cf21ec84618d4bf02c73c0543500ece68d (diff) | |
| download | linux-cbdc12a9fc9d273a648e94eeee6794646f0158f2.tar.xz | |
drm/i915: make A0 wa's applied to A1
Since A1 chips use the same GPU as A0, they need all the
same wa's in the i915 driver. Update some conditionals
to do this.
Signed-off-by: Tim Gore <tim.gore@intel.com>
Reviewed-by: Arun Siluvery <arun.siluvery@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1445856538-5417-1-git-send-email-tim.gore@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index dd63bba147a4..c2e78994af4f 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4687,7 +4687,7 @@ static void gen9_enable_rc6(struct drm_device *dev) "on" : "off"); /* WaRsUseTimeoutMode */ if (IS_SKL_REVID(dev, 0, SKL_REVID_D0) || - IS_BXT_REVID(dev, 0, BXT_REVID_A0)) { + IS_BXT_REVID(dev, 0, BXT_REVID_A1)) { I915_WRITE(GEN6_RC6_THRESHOLD, 625); /* 800us */ I915_WRITE(GEN6_RC_CONTROL, GEN6_RC_CTL_HW_ENABLE | GEN7_RC_CTL_TO_MODE | |