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authorMahesh Kumar <mahesh1.kumar@intel.com>2018-01-30 16:49:13 +0300
committerPaulo Zanoni <paulo.r.zanoni@intel.com>2018-01-31 19:19:51 +0300
commit234059da0f336fff315746ea34d4cf04a36d7c01 (patch)
tree3130b861fa985317c4e72d0c52b1ce84219e1c9f /drivers/gpu/drm/i915/intel_pm.c
parent5b695aff3af5606c4128eba6a64c33c7d74d4f49 (diff)
downloadlinux-234059da0f336fff315746ea34d4cf04a36d7c01.tar.xz
drm/i915/icl: NV12 y-plane ddb is not in same plane
We don't have planar pixel format support implemented for ICL yet. ICL require 2 display planes to be allocated for Planar formats unlike previous GEN. So ICL/GEN11 doesn't require to write Y-plane ddb data in NV12_BUF_CFG register and PLANE_NV12_BUF_CFG register is removed in ICL. This patch removes the PLANE_NV12_BUF_CFG write for ICL. Changes Since V1: - Improve commit message as per Paulo's comment Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: James Ausmus <james.ausmus@intel.com> Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180130134918.32283-5-paulo.r.zanoni@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 24421603e605..766f4fdd633b 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4826,8 +4826,10 @@ static void skl_write_plane_wm(struct intel_crtc *intel_crtc,
skl_ddb_entry_write(dev_priv, PLANE_BUF_CFG(pipe, plane_id),
&ddb->plane[pipe][plane_id]);
- skl_ddb_entry_write(dev_priv, PLANE_NV12_BUF_CFG(pipe, plane_id),
- &ddb->y_plane[pipe][plane_id]);
+ if (INTEL_GEN(dev_priv) < 11)
+ skl_ddb_entry_write(dev_priv,
+ PLANE_NV12_BUF_CFG(pipe, plane_id),
+ &ddb->y_plane[pipe][plane_id]);
}
static void skl_write_cursor_wm(struct intel_crtc *intel_crtc,