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authorImre Deak <imre.deak@intel.com>2013-05-21 21:03:20 +0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-05-22 15:51:26 +0400
commit3598706b52cb45ba0a9e8aa99ce5ac59140f2b8b (patch)
tree2dfeb6b1e1f59b39cfbd5cc20477efc2101b3c7b /drivers/gpu/drm/i915/intel_i2c.c
parente054cc3937a4a58e77870d4c922a7b21824b610a (diff)
downloadlinux-3598706b52cb45ba0a9e8aa99ce5ac59140f2b8b.tar.xz
drm/i915: avoid premature DP AUX timeouts
During DP AUX communication we might time out 1 jiffy too early, because the calculated expiry jiffy value is one less than needed. This is only one reason for false DP AUX timeouts. For a complete solution we also need the following fix, which is now queued for mainline: http://marc.info/?l=linux-kernel&m=136748515710837&w=2 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=64133 Signed-off-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_i2c.c')
-rw-r--r--drivers/gpu/drm/i915/intel_i2c.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index 98cd85352d9a..639fe192997c 100644
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -263,7 +263,8 @@ gmbus_wait_idle(struct drm_i915_private *dev_priv)
/* Important: The hw handles only the first bit, so set only one! */
I915_WRITE(GMBUS4 + reg_offset, GMBUS_IDLE_EN);
- ret = wait_event_timeout(dev_priv->gmbus_wait_queue, C, 10);
+ ret = wait_event_timeout(dev_priv->gmbus_wait_queue, C,
+ msecs_to_jiffies_timeout(10));
I915_WRITE(GMBUS4 + reg_offset, 0);