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authorIngo Molnar <mingo@elte.hu>2009-05-18 09:37:44 +0400
committerIngo Molnar <mingo@elte.hu>2009-05-18 09:37:49 +0400
commitdc3f81b129b5439ba7bac265bbc6a51a39275dae (patch)
tree216030731d911249496d2e97206cd61431e31c89 /drivers/gpu/drm/i915/intel_i2c.c
parentd2517a49d55536b38c7a87e5289550cfedaa4dcc (diff)
parent1406de8e11eb043681297adf86d6892ff8efc27a (diff)
downloadlinux-dc3f81b129b5439ba7bac265bbc6a51a39275dae.tar.xz
Merge commit 'v2.6.30-rc6' into perfcounters/core
Merge reason: this branch was on an -rc4 base, merge it up to -rc6 to get the latest upstream fixes. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_i2c.c')
-rw-r--r--drivers/gpu/drm/i915/intel_i2c.c17
1 files changed, 17 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index 5ee9d4c25753..f7061f68d050 100644
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -34,6 +34,21 @@
#include "i915_drm.h"
#include "i915_drv.h"
+void intel_i2c_quirk_set(struct drm_device *dev, bool enable)
+{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+
+ /* When using bit bashing for I2C, this bit needs to be set to 1 */
+ if (!IS_IGD(dev))
+ return;
+ if (enable)
+ I915_WRITE(CG_2D_DIS,
+ I915_READ(CG_2D_DIS) | DPCUNIT_CLOCK_GATE_DISABLE);
+ else
+ I915_WRITE(CG_2D_DIS,
+ I915_READ(CG_2D_DIS) & (~DPCUNIT_CLOCK_GATE_DISABLE));
+}
+
/*
* Intel GPIO access functions
*/
@@ -153,8 +168,10 @@ struct intel_i2c_chan *intel_i2c_create(struct drm_device *dev, const u32 reg,
goto out_free;
/* JJJ: raise SCL and SDA? */
+ intel_i2c_quirk_set(dev, true);
set_data(chan, 1);
set_clock(chan, 1);
+ intel_i2c_quirk_set(dev, false);
udelay(20);
return chan;