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authorMahesh Kumar <mahesh1.kumar@intel.com>2018-01-30 16:49:12 +0300
committerPaulo Zanoni <paulo.r.zanoni@intel.com>2018-01-31 19:19:32 +0300
commit5b695aff3af5606c4128eba6a64c33c7d74d4f49 (patch)
tree7ca35f69d5d5e5c1895dd5a15290f05645aac4df /drivers/gpu/drm/i915/intel_guc_ads.c
parentdf8ee19087d24ca00c4f76b3a28c793b661b4b1e (diff)
downloadlinux-5b695aff3af5606c4128eba6a64c33c7d74d4f49.tar.xz
drm/i915/icl: Fail flip if ddb allocated are less than min display buffer needed
ICL require DDB allocation of plane to be more than "minimum display buffer needed" for each level in order to enable WM level. This patch implements and consider the same while allocating DDB and enabling WM. Changes Since V1: - rebase Changes Since V2: - Remove extra parentheses - Use FP16.16 only when absolutely necessary (Paulo) Changes Since V3: - Rebase Changes since v4 (from Paulo): - Coding style issue. Changes since v5 (from Paulo): - Do the final checks according to BSpec. Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180130134918.32283-4-paulo.r.zanoni@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_guc_ads.c')
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