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author | Chris Wilson <chris@chris-wilson.co.uk> | 2016-08-05 12:14:23 +0300 |
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committer | Chris Wilson <chris@chris-wilson.co.uk> | 2016-08-05 12:54:43 +0300 |
commit | 3e510a8e65ef6d1cf45c18bf79c8f91ec481f154 (patch) | |
tree | a17a4c68cb4c29a769b1db3187d2b04b5043a27e /drivers/gpu/drm/i915/intel_fbc.c | |
parent | deeb1519b65a92ca06c8e8554a92df0fdb4d5dea (diff) | |
download | linux-3e510a8e65ef6d1cf45c18bf79c8f91ec481f154.tar.xz |
drm/i915: Repack fence tiling mode and stride into a single integer
In the previous commit, we moved the obj->tiling_mode out of a bitfield
and into its own integer so that we could safely use READ_ONCE(). Let us
now repair some of that damage by sharing the tiling_mode with its
companion, the fence stride.
v2: New magic
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1470388464-28458-18-git-send-email-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/intel_fbc.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_fbc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c index d4be07615aa9..85adc2b92594 100644 --- a/drivers/gpu/drm/i915/intel_fbc.c +++ b/drivers/gpu/drm/i915/intel_fbc.c @@ -741,7 +741,7 @@ static void intel_fbc_update_state_cache(struct intel_crtc *crtc, cache->fb.pixel_format = fb->pixel_format; cache->fb.stride = fb->pitches[0]; cache->fb.fence_reg = obj->fence_reg; - cache->fb.tiling_mode = obj->tiling_mode; + cache->fb.tiling_mode = i915_gem_object_get_tiling(obj); } static bool intel_fbc_can_activate(struct intel_crtc *crtc) |