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author | Satheeshakrishna M <satheeshakrishna.m@intel.com> | 2014-08-22 08:19:06 +0400 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-04-16 12:29:05 +0300 |
commit | 1ab23380f8b990ad865349040ec14c3ebe3a09c5 (patch) | |
tree | 0862b833474b5e9e86a743667a51aa4f5930715d /drivers/gpu/drm/i915/intel_dp_mst.c | |
parent | 535afa2e9e3c1867460d6981d879b04d8b2b9ab3 (diff) | |
download | linux-1ab23380f8b990ad865349040ec14c3ebe3a09c5.tar.xz |
drm/i915/bxt: Restrict PORT_CLK_SEL programming below gen9
PORT_CLK_SEL programming is needed only on HSW/BDW.
v2:
- don't program PORT_CLK_SEL from mst encoders either (imre)
v3:
- fix the check for GEN9+ in intel_mst_pre_enable_dp() (damien)
Signed-off-by: Satheeshakrishna M <satheeshakrishna.m@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Sagar Kamble <sagar.a.kamble@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dp_mst.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_dp_mst.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c index 73350894e2c9..3945057c5bbe 100644 --- a/drivers/gpu/drm/i915/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/intel_dp_mst.c @@ -173,8 +173,10 @@ static void intel_mst_pre_enable_dp(struct intel_encoder *encoder) if (intel_dp->active_mst_links == 0) { enum port port = intel_ddi_get_encoder_port(encoder); - I915_WRITE(PORT_CLK_SEL(port), - intel_crtc->config->ddi_pll_sel); + /* FIXME: add support for SKL */ + if (INTEL_INFO(dev)->gen < 9) + I915_WRITE(PORT_CLK_SEL(port), + intel_crtc->config->ddi_pll_sel); intel_ddi_init_dp_buf_reg(&intel_dig_port->base); |