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authorDave Airlie <airlied@redhat.com>2017-07-28 03:19:08 +0300
committerDave Airlie <airlied@redhat.com>2017-07-28 03:19:08 +0300
commitd5bcd1113ba52e1697da804c7eff1af9deea662f (patch)
treea1a0eb8fd85d8b2c49122240fa63a4c76830568e /drivers/gpu/drm/i915/intel_ddi.c
parent2213b666c9abf9b753c43f78c7130be2d662b44f (diff)
parent5fe220a160e5422cebc076393c6bfd6d920243fd (diff)
downloadlinux-d5bcd1113ba52e1697da804c7eff1af9deea662f.tar.xz
Merge tag 'drm-intel-fixes-2017-07-27' of git://anongit.freedesktop.org/git/drm-intel into drm-fixes
i915 fixes for -rc3 Bit more than usual since we missed -rc2. 4x cc: stable, 2 gvt patches, but all fairly minor stuff. Last minute rebase was to add a few missing cc: stable, I did prep the pull this morning already and made sure CI approves. * tag 'drm-intel-fixes-2017-07-27' of git://anongit.freedesktop.org/git/drm-intel: drm/i915: Fix bad comparison in skl_compute_plane_wm. drm/i915: Force CPU synchronisation even if userspace requests ASYNC drm/i915: Only skip updating execobject.offset after error drm/i915: Only mark the execobject as pinned on success drm/i915: Remove assertion from raw __i915_vma_unpin() drm/i915/cnl: Fix loadgen select programming on ddi vswing sequence drm/i915: Fix scaler init during CRTC HW state readout drm/i915/selftests: Fix an error handling path in 'mock_gem_device()' drm/i915: Unbreak gpu reset vs. modeset locking drm/i915: Fix cursor updates on some platforms drm/i915: Fix user ptr check size in eb_relocate_vma() drm/i915/gvt: Extend KBL platform support in GVT-g drm/i915/gvt: Fix the vblank timer close issue after shutdown VMs in reverse
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ddi.c')
-rw-r--r--drivers/gpu/drm/i915/intel_ddi.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 80e96f1f49d2..9edeaaef77ad 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -1896,8 +1896,8 @@ static void cnl_ddi_vswing_sequence(struct intel_encoder *encoder, u32 level)
val = I915_READ(CNL_PORT_TX_DW4_LN(port, ln));
val &= ~LOADGEN_SELECT;
- if (((rate < 600000) && (width == 4) && (ln >= 1)) ||
- ((rate < 600000) && (width < 4) && ((ln == 1) || (ln == 2)))) {
+ if ((rate <= 600000 && width == 4 && ln >= 1) ||
+ (rate <= 600000 && width < 4 && (ln == 1 || ln == 2))) {
val |= LOADGEN_SELECT;
}
I915_WRITE(CNL_PORT_TX_DW4_LN(port, ln), val);